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[RISCV] Enable global merging by default #115495

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Merged
merged 3 commits into from
Nov 15, 2024
Merged

[RISCV] Enable global merging by default #115495

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269df4c
[RISCV] When using global merging, don't enable merging of external g…
asb Nov 8, 2024
fbeca72
[RISCV] Enable global merging by default
asb Nov 8, 2024
3a29c06
Merge remote-tracking branch 'origin/main' into 2024q4-riscv-enable-g…
asb Nov 13, 2024
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18 changes: 16 additions & 2 deletions llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,13 @@ static cl::opt<cl::boolOrDefault>
EnableGlobalMerge("riscv-enable-global-merge", cl::Hidden,
cl::desc("Enable the global merge pass"));

static cl::opt<bool> ForceEnableGlobalMergeExternalGlobals(
"riscv-force-enable-global-merge-external-globals", cl::Hidden,
cl::init(false),
cl::desc(
"If the global merge pass is enabled, force enable global merging of "
"external globals (overriding any logic that might disable it)"));

static cl::opt<bool>
EnableMachineCombiner("riscv-enable-machine-combiner",
cl::desc("Enable the machine combiner pass"),
Expand Down Expand Up @@ -469,10 +476,17 @@ bool RISCVPassConfig::addPreISel() {
addPass(createBarrierNoopPass());
}

if (EnableGlobalMerge == cl::BOU_TRUE) {
if ((TM->getOptLevel() != CodeGenOptLevel::None &&
EnableGlobalMerge == cl::BOU_UNSET) ||
EnableGlobalMerge == cl::BOU_TRUE) {
// FIXME: Like AArch64, we disable extern global merging by default due to
// concerns it might regress some workloads. Unlike AArch64, we don't
// currently support enabling the pass in an "OnlyOptimizeForSize" mode.
// Investigating and addressing both items are TODO.
addPass(createGlobalMergePass(TM, /* MaxOffset */ 2047,
/* OnlyOptimizeForSize */ false,
/* MergeExternalByDefault */ true));
/* MergeExternalByDefault */
ForceEnableGlobalMergeExternalGlobals));
}

return false;
Expand Down
1 change: 1 addition & 0 deletions llvm/test/CodeGen/RISCV/O3-pipeline.ll
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Expand Up @@ -74,6 +74,7 @@
; CHECK-NEXT: Exception handling preparation
; CHECK-NEXT: A No-Op Barrier Pass
; CHECK-NEXT: FunctionPass Manager
; CHECK-NEXT: Merge internal globals
; CHECK-NEXT: Dominator Tree Construction
; CHECK-NEXT: Basic Alias Analysis (stateless AA impl)
; CHECK-NEXT: Function Alias Analysis Results
Expand Down
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-nonzero.ll
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@@ -1,8 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv64 -riscv-enable-global-merge -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=SMALL-DATA
; RUN: llc -mtriple=riscv64 -riscv-enable-global-merge -global-merge-min-data-size=0 \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=MINSIZE
; RUN: llc -mtriple=riscv64 -riscv-force-enable-global-merge-external-globals \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=SMALL-DATA
; RUN: llc -mtriple=riscv64 -global-merge-min-data-size=0 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=MINSIZE

@ig1 = internal global i32 0, align 4
@ig2 = internal global i32 0, align 4
Expand Down
9 changes: 5 additions & 4 deletions llvm/test/CodeGen/RISCV/global-merge-minsize-smalldata-zero.ll
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@@ -1,8 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -riscv-enable-global-merge -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=SMALL-DATA
; RUN: llc -mtriple=riscv64 -riscv-enable-global-merge -global-merge-min-data-size=5 \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=MINSIZE
; RUN: llc -mtriple=riscv32 -riscv-force-enable-global-merge-external-globals \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=SMALL-DATA
; RUN: llc -mtriple=riscv64 -global-merge-min-data-size=5 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=MINSIZE

@ig1 = internal global i32 0, align 4
@ig2 = internal global i32 0, align 4
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/RISCV/global-merge-minsize.ll
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@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -riscv-enable-global-merge -verify-machineinstrs < %s \
; RUN: | FileCheck %s -check-prefix=RV32
; RUN: llc -mtriple=riscv32 -riscv-enable-global-merge -global-merge-min-data-size=5 \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32-MINSIZE
; RUN: llc -mtriple=riscv32 -riscv-force-enable-global-merge-external-globals \
; RUN: -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32
; RUN: llc -mtriple=riscv32 -global-merge-min-data-size=5 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs < %s | FileCheck %s -check-prefix=RV32-MINSIZE

@ig1 = internal global i32 0, align 4
@ig2 = internal global i32 0, align 4
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/RISCV/global-merge-offset.ll
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@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: sed 's/ArrSize/100/g' %s | llc -mtriple=riscv32 -riscv-enable-global-merge \
; RUN: -verify-machineinstrs | FileCheck %s
; RUN: sed 's/ArrSize/100/g' %s | llc -mtriple=riscv64 -riscv-enable-global-merge \
; RUN: -verify-machineinstrs | FileCheck %s
; RUN: sed 's/ArrSize/101/g' %s | llc -mtriple=riscv32 -riscv-enable-global-merge \
; RUN: -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-TOOBIG
; RUN: sed 's/ArrSize/101/g' %s | llc -mtriple=riscv64 -riscv-enable-global-merge \
; RUN: -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-TOOBIG
; RUN: sed 's/ArrSize/100/g' %s | llc -mtriple=riscv32 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs | FileCheck %s
; RUN: sed 's/ArrSize/100/g' %s | llc -mtriple=riscv64 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs | FileCheck %s
; RUN: sed 's/ArrSize/101/g' %s | llc -mtriple=riscv32 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-TOOBIG
; RUN: sed 's/ArrSize/101/g' %s | llc -mtriple=riscv64 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-TOOBIG

; This test demonstrates that the MaxOffset is set correctly for RISC-V by
; constructing an input that is at the limit and comparing.
Expand Down
28 changes: 22 additions & 6 deletions llvm/test/CodeGen/RISCV/global-merge.ll
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Original file line number Diff line number Diff line change
@@ -1,8 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -riscv-enable-global-merge -verify-machineinstrs < %s \
; RUN: | FileCheck %s
; RUN: llc -mtriple=riscv64 -riscv-enable-global-merge -verify-machineinstrs < %s \
; RUN: | FileCheck %s
; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv32 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=CHECK-WEXTERN %s
; RUN: llc -mtriple=riscv64 \
; RUN: -riscv-force-enable-global-merge-external-globals -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=CHECK-WEXTERN %s

@ig1 = internal global i32 0, align 4
@ig2 = internal global i32 0, align 4
Expand All @@ -21,9 +25,21 @@ define void @f1(i32 %a) nounwind {
; CHECK-NEXT: sw a0, %lo(.L_MergedGlobals)(a1)
; CHECK-NEXT: addi a1, a1, %lo(.L_MergedGlobals)
; CHECK-NEXT: sw a0, 4(a1)
; CHECK-NEXT: sw a0, 8(a1)
; CHECK-NEXT: sw a0, 12(a1)
; CHECK-NEXT: lui a1, %hi(eg1)
; CHECK-NEXT: sw a0, %lo(eg1)(a1)
; CHECK-NEXT: lui a1, %hi(eg2)
; CHECK-NEXT: sw a0, %lo(eg2)(a1)
; CHECK-NEXT: ret
;
; CHECK-WEXTERN-LABEL: f1:
; CHECK-WEXTERN: # %bb.0:
; CHECK-WEXTERN-NEXT: lui a1, %hi(.L_MergedGlobals)
; CHECK-WEXTERN-NEXT: sw a0, %lo(.L_MergedGlobals)(a1)
; CHECK-WEXTERN-NEXT: addi a1, a1, %lo(.L_MergedGlobals)
; CHECK-WEXTERN-NEXT: sw a0, 4(a1)
; CHECK-WEXTERN-NEXT: sw a0, 8(a1)
; CHECK-WEXTERN-NEXT: sw a0, 12(a1)
; CHECK-WEXTERN-NEXT: ret
store i32 %a, ptr @ig1, align 4
store i32 %a, ptr @ig2, align 4
store i32 %a, ptr @eg1, align 4
Expand Down
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