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Fix mistakes in #113532 #115631

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Merged
merged 1 commit into from
Nov 10, 2024
Merged

Fix mistakes in #113532 #115631

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2 changes: 0 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -27328,8 +27328,6 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget,
case Intrinsic::x86_t2rpntlvwz0t1_internal:
case Intrinsic::x86_t2rpntlvwz1_internal:
case Intrinsic::x86_t2rpntlvwz1t1_internal: {
if (!Subtarget.hasAMXTILE())
break;
auto *X86MFI = DAG.getMachineFunction().getInfo<X86MachineFunctionInfo>();
X86MFI->setAMXProgModel(AMXProgModelEnum::ManagedRA);
unsigned IntNo = Op.getConstantOperandVal(1);
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1 change: 1 addition & 0 deletions llvm/lib/Target/X86/X86InstrInfo.cpp
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Expand Up @@ -4737,6 +4737,7 @@ static bool isAMXOpcode(unsigned Opc) {
case X86::TILELOADD_EVEX:
case X86::TILESTORED_EVEX:
case X86::PTILEPAIRLOAD:
case X86::PTILEPAIRSTORE:
return true;
}
}
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14 changes: 7 additions & 7 deletions llvm/test/CodeGen/X86/amx_transpose_intrinsics.ll
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Expand Up @@ -80,18 +80,18 @@ define void @test_amx_spill(i8* %pointer, i8* %base, i64 %stride) #0 {
; CHECK-NEXT: tileloadd (%rsi,%rdx), %tmm0
; CHECK-NEXT: t2rpntlvwz0 (%rsi,%rdx), %tmm4
; CHECK-NEXT: t2rpntlvwz0t1 (%rsi,%rdx), %tmm6
; CHECK-NEXT: tilestored %tmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 1024-byte Folded Spill
; CHECK-NEXT: movabsq $64, %rcx
; CHECK-NEXT: tilestored %tmm6, 4032(%rsp,%rcx) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm7, 5056(%rsp,%rcx) # 1024-byte Folded Spill
; CHECK-NEXT: t2rpntlvwz1 (%rsi,%rdx), %tmm6
; CHECK-NEXT: tilestored %tmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm6, 1984(%rsp,%rcx) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm7, 3008(%rsp,%rcx) # 1024-byte Folded Spill
; CHECK-NEXT: t2rpntlvwz1t1 (%rsi,%rdx), %tmm6
; CHECK-NEXT: tilestored %tmm6, {{[-0-9]+}}(%r{{[sb]}}p) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm7, {{[-0-9]+}}(%r{{[sb]}}p) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm6, -64(%rsp,%rcx) # 1024-byte Folded Spill
; CHECK-NEXT: tilestored %tmm7, 960(%rsp,%rcx) # 1024-byte Folded Spill
; CHECK-NEXT: t2rpntlvwz0 (%rsi,%rdx), %tmm6
; CHECK-NEXT: tilestored %tmm4, (%rsi,%rdx)
; CHECK-NEXT: tilestored %tmm5, (%rsi,%rdx)
; CHECK-NEXT: movabsq $64, %rcx
; CHECK-NEXT: tileloadd 4032(%rsp,%rcx), %tmm4 # 1024-byte Folded Reload
; CHECK-NEXT: tileloadd 5056(%rsp,%rcx), %tmm5 # 1024-byte Folded Reload
; CHECK-NEXT: tilestored %tmm4, (%rsi,%rdx)
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