[GlobalISel][ARM] Legalize reset_fpmode #115859
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Implement lowering intrinsic `reset_fpmode` in Global Selector for ARM target.
spavloff
requested review from
TNorthover,
arsenm,
david-greene-cb,
john-brawn-arm,
rovka and
tschuett
Member
|
@llvm/pr-subscribers-backend-arm @llvm/pr-subscribers-llvm-globalisel Author: Serge Pavlov (spavloff) ChangesImplement lowering intrinsic Full diff: https://github.com/llvm/llvm-project/pull/115859.diff 2 Files Affected:
diff --git a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
index 452e908fdad98f..e65ea24c0d23ec 100644
--- a/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp
@@ -163,6 +163,7 @@ ARMLegalizerInfo::ARMLegalizerInfo(const ARMSubtarget &ST) : ST(ST) {
.legalFor({s32});
getActionDefinitionsBuilder(G_RESET_FPENV).alwaysLegal();
getActionDefinitionsBuilder(G_SET_FPMODE).customFor({s32});
+ getActionDefinitionsBuilder(G_RESET_FPMODE).custom();
} else {
getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})
.libcallFor({s32, s64});
@@ -467,6 +468,18 @@ bool ARMLegalizerInfo::legalizeCustom(LegalizerHelper &Helper, MachineInstr &MI,
MIRBuilder.buildSetFPEnv(NewFPSCR);
break;
}
+ case G_RESET_FPMODE: {
+ // To get the default FP mode all control bits are cleared:
+ // FPSCR = FPSCR & (FPStatusBits | FPReservedBits)
+ LLT FPEnvTy = LLT::scalar(32);
+ auto FPEnv = MRI.createGenericVirtualRegister(FPEnvTy);
+ MIRBuilder.buildInstr(G_GET_FPENV).addDef({FPEnv});
+ auto NotModeBitMask = MIRBuilder.buildConstant(
+ FPEnvTy, ARM::FPStatusBits | ARM::FPReservedBits);
+ auto NewFPSCR = MIRBuilder.buildAnd(FPEnvTy, FPEnv, NotModeBitMask);
+ MIRBuilder.buildInstr(G_SET_FPENV).addUse(NewFPSCR.getReg(0));
+ break;
+ }
}
MI.eraseFromParent();
diff --git a/llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll b/llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
index f8dba64e7a01a9..5aa97dafd94334 100644
--- a/llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
+++ b/llvm/test/CodeGen/ARM/GlobalISel/fpenv.ll
@@ -165,5 +165,22 @@ entry:
ret void
}
+define void @reset_fpmode() nounwind {
+; CHECK-LABEL: reset_fpmode:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: vmrs r0, fpscr
+; CHECK-NEXT: ldr r1, .LCPI11_0
+; CHECK-NEXT: and r0, r0, r1
+; CHECK-NEXT: vmsr fpscr, r0
+; CHECK-NEXT: mov pc, lr
+; CHECK-NEXT: .p2align 2
+; CHECK-NEXT: @ %bb.1:
+; CHECK-NEXT: .LCPI11_0:
+; CHECK-NEXT: .long 4160774399 @ 0xf80060ff
+entry:
+ call void @llvm.reset.fpmode()
+ ret void
+}
+
attributes #0 = { nounwind "use-soft-float"="true" }
|
tschuett
reviewed
Nov 12, 2024
| // FPSCR = FPSCR & (FPStatusBits | FPReservedBits) | ||
| LLT FPEnvTy = LLT::scalar(32); | ||
| auto FPEnv = MRI.createGenericVirtualRegister(FPEnvTy); | ||
| MIRBuilder.buildInstr(G_GET_FPENV).addDef({FPEnv}); |
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These should be in the MachineIRBuilder + use auto.
Collaborator
Author
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Use method buildGetFPEnv.
tschuett
reviewed
Nov 12, 2024
| auto NotModeBitMask = MIRBuilder.buildConstant( | ||
| FPEnvTy, ARM::FPStatusBits | ARM::FPReservedBits); | ||
| auto NewFPSCR = MIRBuilder.buildAnd(FPEnvTy, FPEnv, NotModeBitMask); | ||
| MIRBuilder.buildInstr(G_SET_FPENV).addUse(NewFPSCR.getReg(0)); |
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These should be in the MachineIRBuilder.
Collaborator
Author
There was a problem hiding this comment.
Use method buildSetFPEnv.
tschuett
reviewed
Nov 12, 2024
| LLT FPEnvTy = LLT::scalar(32); | ||
| auto FPEnv = MRI.createGenericVirtualRegister(FPEnvTy); | ||
| MIRBuilder.buildInstr(G_GET_FPENV).addDef({FPEnv}); | ||
| auto NotModeBitMask = MIRBuilder.buildConstant( |
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From scanning the legalizer I convinced myself that most opcodes that you build are legal. Now, that G_CONSTANT is custom, you can convince me that the constant is legal.
Collaborator
Author
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The G_CONSTANT is illegal. When legalizer creates it in legalizeInstrStep, the object of type LegalizerWorkListManager adds this instruction to its worklist, and it will be subjected to legalization in next iterations of the legalization in legalizeMachineFunction.
Contributor
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Yes, incremental legalization should be relied on. Legalize actions are not responsible for ensuring every output is legal
arsenm
approved these changes
Nov 13, 2024
tschuett
reviewed
Nov 14, 2024
| // FPSCR = FPSCR & (FPStatusBits | FPReservedBits) | ||
| LLT FPEnvTy = LLT::scalar(32); | ||
| auto FPEnv = MRI.createGenericVirtualRegister(FPEnvTy); | ||
| MIRBuilder.buildGetFPEnv(FPEnv); |
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Shouldn't this be equivalent to:
auto FPEnv = MIRBuilder.buildGetFPEnv(FPEnvTy);
Collaborator
Author
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Yes, changed accordingly.
arsenm
approved these changes
Nov 15, 2024
Collaborator
|
LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/123/builds/9499 Here is the relevant piece of the build log for the reference |
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Implement lowering intrinsic
reset_fpmodein Global Selector for ARM target.