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[InstCombine] Drop range attributes in foldBitCeil #116641

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Merged
merged 2 commits into from
Nov 20, 2024
Merged

[InstCombine] Drop range attributes in foldBitCeil #116641

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7c48f4c
[InstCombine] Add pre-commit tests. NFC.
dtcxzyw Nov 18, 2024
3ffb79c
[InstCombine] Drop range attributes in `foldBitCeil`
dtcxzyw Nov 18, 2024
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9 changes: 7 additions & 2 deletions llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3469,7 +3469,8 @@ static bool isSafeToRemoveBitCeilSelect(ICmpInst::Predicate Pred, Value *Cond0,
// Note that the select is optimized away while the shift count is masked with
// 31. We handle some variations of the input operand like std::bit_ceil(X +
// 1).
static Instruction *foldBitCeil(SelectInst &SI, IRBuilderBase &Builder) {
static Instruction *foldBitCeil(SelectInst &SI, IRBuilderBase &Builder,
InstCombinerImpl &IC) {
Type *SelType = SI.getType();
unsigned BitWidth = SelType->getScalarSizeInBits();

Expand Down Expand Up @@ -3504,6 +3505,10 @@ static Instruction *foldBitCeil(SelectInst &SI, IRBuilderBase &Builder) {
// single hardware instruction as opposed to BitWidth - CTLZ, where BitWidth
// is an integer constant. Masking with BitWidth-1 comes free on some
// hardware as part of the shift instruction.

// Drop range attributes and re-infer them in the next iteration.
cast<Instruction>(Ctlz)->dropPoisonGeneratingAnnotations();
IC.addToWorklist(cast<Instruction>(Ctlz));
Value *Neg = Builder.CreateNeg(Ctlz);
Value *Masked =
Builder.CreateAnd(Neg, ConstantInt::get(SelType, BitWidth - 1));
Expand Down Expand Up @@ -4147,7 +4152,7 @@ Instruction *InstCombinerImpl::visitSelectInst(SelectInst &SI) {
if (sinkNotIntoOtherHandOfLogicalOp(SI))
return &SI;

if (Instruction *I = foldBitCeil(SI, Builder))
if (Instruction *I = foldBitCeil(SI, Builder, *this))
return I;

if (Instruction *I = foldSelectToCmp(SI))
Expand Down
17 changes: 17 additions & 0 deletions llvm/test/Transforms/InstCombine/bit_ceil.ll
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Expand Up @@ -320,6 +320,23 @@ define i32 @pr91691_keep_nsw(i32 %0) {
ret i32 %7
}

define i32 @test_drop_range_attr(i32 %x) {
; CHECK-LABEL: @test_drop_range_attr(
; CHECK-NEXT: [[CTLZ:%.*]] = call range(i32 0, 33) i32 @llvm.ctlz.i32(i32 [[X:%.*]], i1 false)
; CHECK-NEXT: [[TMP1:%.*]] = sub nsw i32 0, [[CTLZ]]
; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[TMP1]], 31
; CHECK-NEXT: [[SEL:%.*]] = shl nuw i32 1, [[TMP2]]
; CHECK-NEXT: ret i32 [[SEL]]
;
%ctlz = call range(i32 1, 33) i32 @llvm.ctlz.i32(i32 %x, i1 false)
%sub = sub i32 32, %ctlz
%shl = shl i32 1, %sub
%dec = add i32 %x, -1
%ult = icmp ult i32 %dec, -2
%sel = select i1 %ult, i32 %shl, i32 1
ret i32 %sel
}

declare i32 @llvm.ctlz.i32(i32, i1 immarg)
declare i64 @llvm.ctlz.i64(i64, i1 immarg)
declare <4 x i32> @llvm.ctlz.v4i32(<4 x i32>, i1)
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