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[LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. #116762

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Merged
merged 5 commits into from
Nov 22, 2024
Merged

[LoongArch] Support LA V1.1 feature ld-seq-sa that don't generate dbar 0x700. #116762

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eef0e50
[LoongArch] Support feature ld-seq-sa that don't generate dbar 0x700.
tangaac Nov 1, 2024
b119154
simplify the test
tangaac Nov 20, 2024
9ffa40e
update the test
tangaac Nov 21, 2024
020c29c
support ld-seq-sa in sys::getHostCPUFeatures
tangaac Nov 22, 2024
170dbe1
Update llvm/lib/TargetParser/Host.cpp
tangaac Nov 22, 2024
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6 changes: 4 additions & 2 deletions llvm/lib/TargetParser/Host.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2011,8 +2011,9 @@ const StringMap<bool> sys::getHostCPUFeatures() {
const StringMap<bool> sys::getHostCPUFeatures() {
unsigned long hwcap = getauxval(AT_HWCAP);
bool HasFPU = hwcap & (1UL << 3); // HWCAP_LOONGARCH_FPU
uint32_t cpucfg2 = 0x2;
uint32_t cpucfg2 = 0x2, cpucfg3 = 0x3;
__asm__("cpucfg %[cpucfg2], %[cpucfg2]\n\t" : [cpucfg2] "+r"(cpucfg2));
__asm__("cpucfg %[cpucfg3], %[cpucfg3]\n\t" : [cpucfg3] "+r"(cpucfg3));

StringMap<bool> Features;

Expand All @@ -2026,12 +2027,13 @@ const StringMap<bool> sys::getHostCPUFeatures() {
Features["frecipe"] = cpucfg2 & (1U << 25); // CPUCFG.2.FRECIPE
Features["lam-bh"] = cpucfg2 & (1U << 27); // CPUCFG.2.LAM_BH

Features["ld-seq-sa"] = cpucfg3 & (1U << 23); // CPUCFG.3.LD_SEQ_SA

// TODO: Need to complete.
// Features["div32"] = cpucfg2 & (1U << 26); // CPUCFG.2.DIV32
// Features["lamcas"] = cpucfg2 & (1U << 28); // CPUCFG.2.LAMCAS
// Features["llacq-screl"] = cpucfg2 & (1U << 29); // CPUCFG.2.LLACQ_SCREL
// Features["scq"] = cpucfg2 & (1U << 30); // CPUCFG.2.SCQ
// Features["ld-seq-sa"] = cpucfg3 & (1U << 23); // CPUCFG.3.LD_SEQ_SA
return Features;
}
#elif defined(__linux__) && defined(__riscv)
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