Skip to content
Merged
Show file tree
Hide file tree
Changes from 4 commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 4 additions & 0 deletions clang/include/clang/Driver/Options.td
Original file line number Diff line number Diff line change
Expand Up @@ -5417,6 +5417,10 @@ def mld_seq_sa : Flag<["-"], "mld-seq-sa">, Group<m_loongarch_Features_Group>,
HelpText<"Do not generate load-load barrier instructions (dbar 0x700)">;
def mno_ld_seq_sa : Flag<["-"], "mno-ld-seq-sa">, Group<m_loongarch_Features_Group>,
HelpText<"Generate load-load barrier instructions (dbar 0x700)">;
def mdiv32 : Flag<["-"], "mdiv32">, Group<m_loongarch_Features_Group>,
HelpText<"Use div.w[u] and mod.w[u] instructions with input not sign-extended.">;
def mno_div32 : Flag<["-"], "mno-div32">, Group<m_loongarch_Features_Group>,
HelpText<"Do not use div.w[u] and mod.w[u] instructions with input not sign-extended.">;
def mannotate_tablejump : Flag<["-"], "mannotate-tablejump">, Group<m_loongarch_Features_Group>,
HelpText<"Enable annotate table jump instruction to correlate it with the jump table.">;
def mno_annotate_tablejump : Flag<["-"], "mno-annotate-tablejump">, Group<m_loongarch_Features_Group>,
Expand Down
8 changes: 7 additions & 1 deletion clang/lib/Basic/Targets/LoongArch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -205,7 +205,8 @@ void LoongArchTargetInfo::getTargetDefines(const LangOptions &Opts,
// TODO: As more features of the V1.1 ISA are supported, a unified "v1.1"
// arch feature set will be used to include all sub-features belonging to
// the V1.1 ISA version.
if (HasFeatureFrecipe && HasFeatureLAM_BH && HasFeatureLD_SEQ_SA)
if (HasFeatureFrecipe && HasFeatureLAM_BH && HasFeatureLD_SEQ_SA &&
HasFeatureDiv32)
Builder.defineMacro("__loongarch_arch",
Twine('"') + "la64v1.1" + Twine('"'));
else
Expand Down Expand Up @@ -242,6 +243,9 @@ void LoongArchTargetInfo::getTargetDefines(const LangOptions &Opts,
if (HasFeatureLD_SEQ_SA)
Builder.defineMacro("__loongarch_ld_seq_sa", Twine(1));

if (HasFeatureDiv32)
Builder.defineMacro("__loongarch_div32", Twine(1));

StringRef ABI = getABI();
if (ABI == "lp64d" || ABI == "lp64f" || ABI == "lp64s")
Builder.defineMacro("__loongarch_lp64");
Expand Down Expand Up @@ -322,6 +326,8 @@ bool LoongArchTargetInfo::handleTargetFeatures(
HasFeatureLAM_BH = true;
else if (Feature == "+ld-seq-sa")
HasFeatureLD_SEQ_SA = true;
else if (Feature == "+div32")
HasFeatureDiv32 = true;
}
return true;
}
Expand Down
2 changes: 2 additions & 0 deletions clang/lib/Basic/Targets/LoongArch.h
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArchTargetInfo : public TargetInfo {
bool HasFeatureFrecipe;
bool HasFeatureLAM_BH;
bool HasFeatureLD_SEQ_SA;
bool HasFeatureDiv32;

public:
LoongArchTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
Expand All @@ -43,6 +44,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArchTargetInfo : public TargetInfo {
HasFeatureFrecipe = false;
HasFeatureLAM_BH = false;
HasFeatureLD_SEQ_SA = false;
HasFeatureDiv32 = false;
LongDoubleWidth = 128;
LongDoubleAlign = 128;
LongDoubleFormat = &llvm::APFloat::IEEEquad();
Expand Down
9 changes: 9 additions & 0 deletions clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -283,6 +283,15 @@ void loongarch::getLoongArchTargetFeatures(const Driver &D,
else
Features.push_back("-ld-seq-sa");
}

// Select div32 feature determined by -m[no-]div32.
if (const Arg *A =
Args.getLastArg(options::OPT_mdiv32, options::OPT_mno_div32)) {
if (A->getOption().matches(options::OPT_mdiv32))
Features.push_back("+div32");
else
Features.push_back("-div32");
}
}

std::string loongarch::postProcessTargetCPUString(const std::string &CPU,
Expand Down
8 changes: 4 additions & 4 deletions clang/test/Driver/loongarch-march.c
Original file line number Diff line number Diff line change
Expand Up @@ -39,21 +39,21 @@

// CC1-LA64V1P1: "-target-cpu" "loongarch64"
// CC1-LA64V1P1-NOT: "-target-feature"
// CC1-LA64V1P1: "-target-feature" "+64bit" "-target-feature" "+d" "-target-feature" "+lsx" "-target-feature" "+ual" "-target-feature" "+frecipe" "-target-feature" "+lam-bh" "-target-feature" "+ld-seq-sa"
// CC1-LA64V1P1: "-target-feature" "+64bit" "-target-feature" "+d" "-target-feature" "+lsx" "-target-feature" "+ual" "-target-feature" "+frecipe" "-target-feature" "+lam-bh" "-target-feature" "+ld-seq-sa" "-target-feature" "+div32"
// CC1-LA64V1P1-NOT: "-target-feature"
// CC1-LA64V1P1: "-target-abi" "lp64d"

// CC1-LA664: "-target-cpu" "la664"
// CC1-LA664-NOT: "-target-feature"
// CC1-LA664: "-target-feature" "+64bit" "-target-feature" "+f" "-target-feature" "+d" "-target-feature" "+lsx" "-target-feature" "+lasx" "-target-feature" "+ual" "-target-feature" "+frecipe" "-target-feature" "+lam-bh" "-target-feature" "+ld-seq-sa"
// CC1-LA664: "-target-feature" "+64bit" "-target-feature" "+f" "-target-feature" "+d" "-target-feature" "+lsx" "-target-feature" "+lasx" "-target-feature" "+ual" "-target-feature" "+frecipe" "-target-feature" "+lam-bh" "-target-feature" "+ld-seq-sa" "-target-feature" "+div32"
// CC1-LA664-NOT: "-target-feature"
// CC1-LA664: "-target-abi" "lp64d"

// IR-LOONGARCH64: attributes #[[#]] ={{.*}}"target-cpu"="loongarch64" {{.*}}"target-features"="+64bit,+d,+f,+ual"
// IR-LA464: attributes #[[#]] ={{.*}}"target-cpu"="la464" {{.*}}"target-features"="+64bit,+d,+f,+lasx,+lsx,+ual"
// IR-LA64V1P0: attributes #[[#]] ={{.*}}"target-cpu"="loongarch64" {{.*}}"target-features"="+64bit,+d,+lsx,+ual"
// IR-LA64V1P1: attributes #[[#]] ={{.*}}"target-cpu"="loongarch64" {{.*}}"target-features"="+64bit,+d,+frecipe,+lam-bh,+ld-seq-sa,+lsx,+ual"
// IR-LA664: attributes #[[#]] ={{.*}}"target-cpu"="la664" {{.*}}"target-features"="+64bit,+d,+f,+frecipe,+lam-bh,+lasx,+ld-seq-sa,+lsx,+ual"
// IR-LA64V1P1: attributes #[[#]] ={{.*}}"target-cpu"="loongarch64" {{.*}}"target-features"="+64bit,+d,+div32,+frecipe,+lam-bh,+ld-seq-sa,+lsx,+ual"
// IR-LA664: attributes #[[#]] ={{.*}}"target-cpu"="la664" {{.*}}"target-features"="+64bit,+d,+div32,+f,+frecipe,+lam-bh,+lasx,+ld-seq-sa,+lsx,+ual"

int foo(void) {
return 3;
Expand Down
30 changes: 30 additions & 0 deletions clang/test/Driver/loongarch-mdiv32.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,30 @@
/// Test -m[no]div32 options.

// RUN: %clang --target=loongarch64 -mdiv32 -fsyntax-only %s -### 2>&1 | \
// RUN: FileCheck %s --check-prefix=CC1-DIV32
// RUN: %clang --target=loongarch64 -mno-div32 -fsyntax-only %s -### 2>&1 | \
// RUN: FileCheck %s --check-prefix=CC1-NO-DIV32
// RUN: %clang --target=loongarch64 -mno-div32 -mdiv32 -fsyntax-only %s -### 2>&1 | \
// RUN: FileCheck %s --check-prefix=CC1-DIV32
// RUN: %clang --target=loongarch64 -mdiv32 -mno-div32 -fsyntax-only %s -### 2>&1 | \
// RUN: FileCheck %s --check-prefix=CC1-NO-DIV32

// RUN: %clang --target=loongarch64 -mdiv32 -S -emit-llvm %s -o - | \
// RUN: FileCheck %s --check-prefix=IR-DIV32
// RUN: %clang --target=loongarch64 -mno-div32 -S -emit-llvm %s -o - | \
// RUN: FileCheck %s --check-prefix=IR-NO-DIV32
// RUN: %clang --target=loongarch64 -mno-div32 -mdiv32 -S -emit-llvm %s -o - | \
// RUN: FileCheck %s --check-prefix=IR-DIV32
// RUN: %clang --target=loongarch64 -mdiv32 -mno-div32 -S -emit-llvm %s -o - | \
// RUN: FileCheck %s --check-prefix=IR-NO-DIV32


// CC1-DIV32: "-target-feature" "+div32"
// CC1-NO-DIV32: "-target-feature" "-div32"

// IR-DIV32: attributes #[[#]] ={{.*}}"target-features"="{{(.*,)?}}+div32{{(,.*)?}}"
// IR-NO-DIV32: attributes #[[#]] ={{.*}}"target-features"="{{(.*,)?}}-div32{{(,.*)?}}"

int foo(void) {
return 42;
}
27 changes: 18 additions & 9 deletions clang/test/Preprocessor/init-loongarch.c
Original file line number Diff line number Diff line change
Expand Up @@ -798,7 +798,7 @@
// LA64-FPU0-LP64S-NOT: #define __loongarch_single_float
// LA64-FPU0-LP64S: #define __loongarch_soft_float 1

/// Check __loongarch_arch{_tune/_frecipe/_lam_bh/_ld_seq_sa}.
/// Check __loongarch_arch{_tune/_frecipe/_lam_bh/_ld_seq_sa/_div32}.

// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - | \
// RUN: FileCheck --match-full-lines --check-prefix=ARCH-TUNE -DARCH=la64v1.0 -DTUNE=loongarch64 %s
Expand All @@ -823,43 +823,52 @@
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +lsx | \
// RUN: FileCheck --match-full-lines --check-prefix=ARCH-TUNE -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA -DARCH=la64v1.1 -DTUNE=loongarch64 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA,DIV32 -DARCH=la64v1.1 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -frecipe | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH,LD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH,LD-SEQ-SA,DIV32 -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -lsx | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA -DARCH=loongarch64 -DTUNE=loongarch64 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA,DIV32 -DARCH=loongarch64 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +frecipe | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE -DARCH=loongarch64 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +lsx -Xclang -target-feature -Xclang +frecipe | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.0 -Xclang -target-feature -Xclang +lam-bh | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -lam-bh | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LD-SEQ-SA,DIV32 -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +lam-bh | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH -DARCH=loongarch64 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +lsx -Xclang -target-feature -Xclang +lam-bh | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LAM-BH -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.0 -Xclang -target-feature -Xclang +ld-seq-sa | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -ld-seq-sa | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,DIV32 -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +ld-seq-sa | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LD-SEQ-SA -DARCH=loongarch64 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +lsx -Xclang -target-feature -Xclang +ld-seq-sa | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,LD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.0 -Xclang -target-feature -Xclang +frecipe -Xclang -target-feature -Xclang +lam-bh -Xclang -target-feature -Xclang +ld-seq-sa | \
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.0 -Xclang -target-feature -Xclang +div32 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,DIV32 -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.1 -Xclang -target-feature -Xclang -div32| \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +div32 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,DIV32 -DARCH=loongarch64 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -Xclang -target-feature -Xclang +lsx -Xclang -target-feature -Xclang +div32 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,DIV32 -DARCH=la64v1.0 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la64v1.0 -Xclang -target-feature -Xclang +frecipe -Xclang -target-feature -Xclang +lam-bh -Xclang -target-feature -Xclang +ld-seq-sa -Xclang -target-feature -Xclang +div32 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE -DARCH=la64v1.1 -DTUNE=loongarch64 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la664 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA -DARCH=la664 -DTUNE=la664 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA,DIV32 -DARCH=la664 -DTUNE=la664 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -mtune=la664 | \
// RUN: FileCheck --match-full-lines --check-prefix=ARCH-TUNE -DARCH=la64v1.0 -DTUNE=la664 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=loongarch64 -mtune=la664 | \
// RUN: FileCheck --match-full-lines --check-prefix=ARCH-TUNE -DARCH=loongarch64 -DTUNE=la664 %s
// RUN: %clang --target=loongarch64 -x c -E -dM %s -o - -march=la664 -mtune=loongarch64 | \
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA -DARCH=la664 -DTUNE=loongarch64 %s
// RUN: FileCheck --match-full-lines --check-prefixes=ARCH-TUNE,FRECIPE,LAM-BH,LD-SEQ-SA,DIV32 -DARCH=la664 -DTUNE=loongarch64 %s

// ARCH-TUNE: #define __loongarch_arch "[[ARCH]]"
// DIV32: #define __loongarch_div32 1
// FRECIPE: #define __loongarch_frecipe 1
// LAM-BH: #define __loongarch_lam_bh 1
// LD-SEQ-SA: #define __loongarch_ld_seq_sa 1
Expand Down
3 changes: 2 additions & 1 deletion llvm/include/llvm/TargetParser/LoongArchTargetParser.def
Original file line number Diff line number Diff line change
Expand Up @@ -13,6 +13,7 @@ LOONGARCH_FEATURE("+ual", FK_UAL)
LOONGARCH_FEATURE("+frecipe", FK_FRECIPE)
LOONGARCH_FEATURE("+lam-bh", FK_LAM_BH)
LOONGARCH_FEATURE("+ld-seq-sa", FK_LD_SEQ_SA)
LOONGARCH_FEATURE("+div32", FK_DIV32)

#undef LOONGARCH_FEATURE

Expand All @@ -22,6 +23,6 @@ LOONGARCH_FEATURE("+ld-seq-sa", FK_LD_SEQ_SA)

LOONGARCH_ARCH("loongarch64", AK_LOONGARCH64, FK_64BIT | FK_FP32 | FK_FP64 | FK_UAL)
LOONGARCH_ARCH("la464", AK_LA464, FK_64BIT | FK_FP32 | FK_FP64 | FK_LSX | FK_LASX | FK_UAL)
LOONGARCH_ARCH("la664", AK_LA664, FK_64BIT | FK_FP32 | FK_FP64 | FK_LSX | FK_LASX | FK_UAL | FK_FRECIPE | FK_LAM_BH | FK_LD_SEQ_SA)
LOONGARCH_ARCH("la664", AK_LA664, FK_64BIT | FK_FP32 | FK_FP64 | FK_LSX | FK_LASX | FK_UAL | FK_FRECIPE | FK_LAM_BH | FK_LD_SEQ_SA | FK_DIV32)

#undef LOONGARCH_ARCH
2 changes: 2 additions & 0 deletions llvm/include/llvm/TargetParser/LoongArchTargetParser.h
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,8 @@ enum FeatureKind : uint32_t {
// Do not generate load-load barrier instructions (dbar 0x700).
FK_LD_SEQ_SA = 1 << 12,

// Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
FK_DIV32 = 1 << 13,
};

struct FeatureInfo {
Expand Down
9 changes: 8 additions & 1 deletion llvm/lib/Target/LoongArch/LoongArch.td
Original file line number Diff line number Diff line change
Expand Up @@ -123,6 +123,12 @@ def FeatureLD_SEQ_SA
"Don't use load-load barrier (dbar 0x700).">;
def HasLD_SEQ_SA : Predicate<"Subtarget->hasLD_SEQ_SA()">;

// Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended.
def FeatureDiv32
: SubtargetFeature<"div32", "HasDiv32", "true",
"Assume div.w[u] and mod.w[u] can handle inputs that are not sign-extended">;
def HasDiv32 : Predicate<"Subtarget->hasDiv32()">;

def TunePreferWInst
: SubtargetFeature<"prefer-w-inst", "PreferWInst", "true",
"Prefer instructions with W suffix">;
Expand Down Expand Up @@ -165,7 +171,8 @@ def : ProcessorModel<"la664", NoSchedModel, [Feature64Bit,
FeatureExtLVZ,
FeatureExtLBT,
FeatureFrecipe,
FeatureLAM_BH]>;
FeatureLAM_BH,
FeatureDiv32]>;

//===----------------------------------------------------------------------===//
// Define the LoongArch target.
Expand Down
5 changes: 4 additions & 1 deletion llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2833,7 +2833,10 @@ void LoongArchTargetLowering::ReplaceNodeResults(
case ISD::UREM:
assert(VT == MVT::i32 && Subtarget.is64Bit() &&
"Unexpected custom legalisation");
Results.push_back(customLegalizeToWOp(N, DAG, 2, ISD::SIGN_EXTEND));
Results.push_back(customLegalizeToWOp(N, DAG, 2,
Subtarget.hasDiv32() && VT == MVT::i32
? ISD::ANY_EXTEND
: ISD::SIGN_EXTEND));
break;
case ISD::SHL:
case ISD::SRA:
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/TargetParser/Host.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2025,12 +2025,12 @@ const StringMap<bool> sys::getHostCPUFeatures() {
Features["lvz"] = hwcap & (1UL << 9); // HWCAP_LOONGARCH_LVZ

Features["frecipe"] = cpucfg2 & (1U << 25); // CPUCFG.2.FRECIPE
Features["div32"] = cpucfg2 & (1U << 26); // CPUCFG.2.DIV32
Features["lam-bh"] = cpucfg2 & (1U << 27); // CPUCFG.2.LAM_BH

Features["ld-seq-sa"] = cpucfg3 & (1U << 23); // CPUCFG.3.LD_SEQ_SA

// TODO: Need to complete.
// Features["div32"] = cpucfg2 & (1U << 26); // CPUCFG.2.DIV32
// Features["lamcas"] = cpucfg2 & (1U << 28); // CPUCFG.2.LAMCAS
// Features["llacq-screl"] = cpucfg2 & (1U << 29); // CPUCFG.2.LLACQ_SCREL
// Features["scq"] = cpucfg2 & (1U << 30); // CPUCFG.2.SCQ
Expand Down
1 change: 1 addition & 0 deletions llvm/lib/TargetParser/LoongArchTargetParser.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,7 @@ bool LoongArch::getArchFeatures(StringRef Arch,
Features.push_back("+frecipe");
Features.push_back("+lam-bh");
Features.push_back("+ld-seq-sa");
Features.push_back("+div32");
}
return true;
}
Expand Down
Original file line number Diff line number Diff line change
@@ -0,0 +1,79 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s --check-prefix=LA64
; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s --check-prefix=LA64-DIV32

define i32 @divw(i64 %a, i64 %b) {
; LA64-LABEL: divw:
; LA64: # %bb.0:
; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: addi.w $a1, $a1, 0
; LA64-NEXT: div.d $a0, $a0, $a1
; LA64-NEXT: ret
;
; LA64-DIV32-LABEL: divw:
Copy link
Contributor

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Leave a TODO here that the issue will be addressed by another PR.

; LA64-DIV32: # %bb.0:
; LA64-DIV32-NEXT: addi.w $a0, $a0, 0
; LA64-DIV32-NEXT: addi.w $a1, $a1, 0
; LA64-DIV32-NEXT: div.d $a0, $a0, $a1
; LA64-DIV32-NEXT: ret
%conv1 = trunc i64 %a to i32
%conv2 = trunc i64 %b to i32
%r = sdiv i32 %conv1, %conv2
ret i32 %r
}

define i32 @divwu(i64 %a, i64 %b) {
; LA64-LABEL: divwu:
; LA64: # %bb.0:
; LA64-NEXT: addi.w $a1, $a1, 0
; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: div.wu $a0, $a0, $a1
; LA64-NEXT: ret
;
; LA64-DIV32-LABEL: divwu:
; LA64-DIV32: # %bb.0:
; LA64-DIV32-NEXT: div.wu $a0, $a0, $a1
; LA64-DIV32-NEXT: ret
%conv1 = trunc i64 %a to i32
%conv2 = trunc i64 %b to i32
%r = udiv i32 %conv1, %conv2
ret i32 %r
}

define i32 @modw(i64 %a, i64 %b) {
; LA64-LABEL: modw:
; LA64: # %bb.0:
; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: addi.w $a1, $a1, 0
; LA64-NEXT: mod.d $a0, $a0, $a1
; LA64-NEXT: ret
;
; LA64-DIV32-LABEL: modw:
; LA64-DIV32: # %bb.0:
; LA64-DIV32-NEXT: addi.w $a0, $a0, 0
; LA64-DIV32-NEXT: addi.w $a1, $a1, 0
; LA64-DIV32-NEXT: mod.d $a0, $a0, $a1
; LA64-DIV32-NEXT: ret
%conv1 = trunc i64 %a to i32
%conv2 = trunc i64 %b to i32
%r = srem i32 %conv1, %conv2
ret i32 %r
}

define i32 @modwu(i64 %a, i64 %b) {
; LA64-LABEL: modwu:
; LA64: # %bb.0:
; LA64-NEXT: addi.w $a1, $a1, 0
; LA64-NEXT: addi.w $a0, $a0, 0
; LA64-NEXT: mod.wu $a0, $a0, $a1
; LA64-NEXT: ret
;
; LA64-DIV32-LABEL: modwu:
; LA64-DIV32: # %bb.0:
; LA64-DIV32-NEXT: mod.wu $a0, $a0, $a1
; LA64-DIV32-NEXT: ret
%conv1 = trunc i64 %a to i32
%conv2 = trunc i64 %b to i32
%r = urem i32 %conv1, %conv2
ret i32 %r
}
Loading