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[mlir][spirv] Use assemblyFormat to define {InBound}PtrAccessChainOp assembly #116943

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Merged
kuhar merged 1 commit into from
Nov 25, 2024
Merged

[mlir][spirv] Use assemblyFormat to define {InBound}PtrAccessChainOp assembly #116943

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35 changes: 15 additions & 20 deletions mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
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Original file line number Diff line number Diff line change
Expand Up @@ -46,18 +46,13 @@ def SPIRV_AccessChainOp : SPIRV_Op<"AccessChain", [Pure]> {
- must be an OpConstant when indexing into a structure.

<!-- End of AutoGen section -->
```
access-chain-op ::= ssa-id `=` `spirv.AccessChain` ssa-use
`[` ssa-use (',' ssa-use)* `]`
`:` pointer-type
```

#### Example:

```mlir
%0 = "spirv.Constant"() { value = 1: i32} : () -> i32
%1 = spirv.Variable : !spirv.ptr<!spirv.struct<f32, !spirv.array<4xf32>>, Function>
%2 = spirv.AccessChain %1[%0] : !spirv.ptr<!spirv.struct<f32, !spirv.array<4xf32>>, Function>
%2 = spirv.AccessChain %1[%0] : !spirv.ptr<!spirv.struct<f32, !spirv.array<4xf32>>, Function> -> !spirv.ptr<!spirv.array<4xf32>, Function>
%3 = spirv.Load "Function" %2 ["Volatile"] : !spirv.array<4xf32>
```
}];
Expand Down Expand Up @@ -149,17 +144,11 @@ def SPIRV_InBoundsPtrAccessChainOp : SPIRV_Op<"InBoundsPtrAccessChain", [Pure]>

<!-- End of AutoGen section -->

```
access-chain-op ::= ssa-id `=` `spirv.InBoundsPtrAccessChain` ssa-use
`[` ssa-use (',' ssa-use)* `]`
`:` pointer-type
```

#### Example:

```mlir
func @inbounds_ptr_access_chain(%arg0: !spirv.ptr<f32, CrossWorkgroup>, %arg1 : i64) -> () {
%0 = spirv.InBoundsPtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64
%0 = spirv.InBoundsPtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64 -> !spirv.ptr<f32, CrossWorkgroup>
...
}
```
Expand All @@ -183,6 +172,12 @@ def SPIRV_InBoundsPtrAccessChainOp : SPIRV_Op<"InBoundsPtrAccessChain", [Pure]>
);

let builders = [OpBuilder<(ins "Value":$basePtr, "Value":$element, "ValueRange":$indices)>];

let hasCustomAssemblyFormat = 0;

let assemblyFormat = [{
$base_ptr `[` $element ($indices^)? `]` attr-dict `:` type($base_ptr) `,` type($element) (`,` type($indices)^)? `->` type($result)
}];
}

// -----
Expand Down Expand Up @@ -275,17 +270,11 @@ def SPIRV_PtrAccessChainOp : SPIRV_Op<"PtrAccessChain", [Pure]> {

<!-- End of AutoGen section -->

```
[access-chain-op ::= ssa-id `=` `spirv.PtrAccessChain` ssa-use
`[` ssa-use (',' ssa-use)* `]`
`:` pointer-type
```

#### Example:

```mlir
func @ptr_access_chain(%arg0: !spirv.ptr<f32, CrossWorkgroup>, %arg1 : i64) -> () {
%0 = spirv.PtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64
%0 = spirv.PtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64 -> !spirv.ptr<f32, CrossWorkgroup>
...
}
```
Expand All @@ -311,6 +300,12 @@ def SPIRV_PtrAccessChainOp : SPIRV_Op<"PtrAccessChain", [Pure]> {
);

let builders = [OpBuilder<(ins "Value":$basePtr, "Value":$element, "ValueRange":$indices)>];

let hasCustomAssemblyFormat = 0;

let assemblyFormat = [{
$base_ptr `[` $element ($indices^)? `]` attr-dict `:` type($base_ptr) `,` type($element) (`,` type($indices)^)? `->` type($result)
}];
}

// -----
Expand Down
70 changes: 0 additions & 70 deletions mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
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Expand Up @@ -543,56 +543,6 @@ LogicalResult CopyMemoryOp::verify() {
return verifySourceMemoryAccessAttribute(*this);
}

static ParseResult parsePtrAccessChainOpImpl(StringRef opName,
OpAsmParser &parser,
OperationState &state) {
OpAsmParser::UnresolvedOperand ptrInfo;
SmallVector<OpAsmParser::UnresolvedOperand, 4> indicesInfo;
Type type;
auto loc = parser.getCurrentLocation();
SmallVector<Type, 4> indicesTypes;

if (parser.parseOperand(ptrInfo) ||
parser.parseOperandList(indicesInfo, OpAsmParser::Delimiter::Square) ||
parser.parseColonType(type) ||
parser.resolveOperand(ptrInfo, type, state.operands))
return failure();

// Check that the provided indices list is not empty before parsing their
// type list.
if (indicesInfo.empty())
return emitError(state.location) << opName << " expected element";

if (parser.parseComma() || parser.parseTypeList(indicesTypes))
return failure();

// Check that the indices types list is not empty and that it has a one-to-one
// mapping to the provided indices.
if (indicesTypes.size() != indicesInfo.size())
return emitError(state.location)
<< opName
<< " indices types' count must be equal to indices info count";

if (parser.resolveOperands(indicesInfo, indicesTypes, loc, state.operands))
return failure();

auto resultType = getElementPtrType(
type, llvm::ArrayRef(state.operands).drop_front(2), state.location);
if (!resultType)
return failure();

state.addTypes(resultType);
return success();
}

template <typename Op>
static auto concatElemAndIndices(Op op) {
SmallVector<Value> ret(op.getIndices().size() + 1);
ret[0] = op.getElement();
llvm::copy(op.getIndices(), ret.begin() + 1);
return ret;
}

//===----------------------------------------------------------------------===//
// spirv.InBoundsPtrAccessChainOp
//===----------------------------------------------------------------------===//
Expand All @@ -605,16 +555,6 @@ void InBoundsPtrAccessChainOp::build(OpBuilder &builder, OperationState &state,
build(builder, state, type, basePtr, element, indices);
}

ParseResult InBoundsPtrAccessChainOp::parse(OpAsmParser &parser,
OperationState &result) {
return parsePtrAccessChainOpImpl(
spirv::InBoundsPtrAccessChainOp::getOperationName(), parser, result);
}

void InBoundsPtrAccessChainOp::print(OpAsmPrinter &printer) {
printAccessChain(*this, concatElemAndIndices(*this), printer);
}

LogicalResult InBoundsPtrAccessChainOp::verify() {
return verifyAccessChain(*this, getIndices());
}
Expand All @@ -630,16 +570,6 @@ void PtrAccessChainOp::build(OpBuilder &builder, OperationState &state,
build(builder, state, type, basePtr, element, indices);
}

ParseResult PtrAccessChainOp::parse(OpAsmParser &parser,
OperationState &result) {
return parsePtrAccessChainOpImpl(spirv::PtrAccessChainOp::getOperationName(),
parser, result);
}

void PtrAccessChainOp::print(OpAsmPrinter &printer) {
printAccessChain(*this, concatElemAndIndices(*this), printer);
}

LogicalResult PtrAccessChainOp::verify() {
return verifyAccessChain(*this, getIndices());
}
Expand Down
4 changes: 2 additions & 2 deletions mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -699,7 +699,7 @@ func.func @copy_memory_print_maa() {
// CHECK-SAME: %[[ARG1:.*]]: i64)
// CHECK: spirv.PtrAccessChain %[[ARG0]][%[[ARG1]]] : !spirv.ptr<f32, CrossWorkgroup>, i64
func.func @ptr_access_chain1(%arg0: !spirv.ptr<f32, CrossWorkgroup>, %arg1 : i64) -> () {
%0 = spirv.PtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64
%0 = spirv.PtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64 -> !spirv.ptr<f32, CrossWorkgroup>
return
}

Expand All @@ -714,6 +714,6 @@ func.func @ptr_access_chain1(%arg0: !spirv.ptr<f32, CrossWorkgroup>, %arg1 : i64
// CHECK-SAME: %[[ARG1:.*]]: i64)
// CHECK: spirv.InBoundsPtrAccessChain %[[ARG0]][%[[ARG1]]] : !spirv.ptr<f32, CrossWorkgroup>, i64
func.func @inbounds_ptr_access_chain1(%arg0: !spirv.ptr<f32, CrossWorkgroup>, %arg1 : i64) -> () {
%0 = spirv.InBoundsPtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64
%0 = spirv.InBoundsPtrAccessChain %arg0[%arg1] : !spirv.ptr<f32, CrossWorkgroup>, i64 -> !spirv.ptr<f32, CrossWorkgroup>
return
}
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