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[LoongArch] Use getSignedConstant() where necessary #117172

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merged 2 commits into from
Nov 22, 2024
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[LoongArch] Use getSignedConstant() where necessary #117172

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[Loongarch] Use getSignedConstant() where necessary
nikic Nov 21, 2024
1196058
Drop getSignedIntPtrConstant again
nikic Nov 22, 2024
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2 changes: 2 additions & 0 deletions llvm/include/llvm/CodeGen/SelectionDAG.h
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Original file line number Diff line number Diff line change
Expand Up @@ -683,6 +683,8 @@ class SelectionDAG {
bool isTarget = false, bool isOpaque = false);
SDValue getIntPtrConstant(uint64_t Val, const SDLoc &DL,
bool isTarget = false);
SDValue getSignedIntPtrConstant(int64_t Val, const SDLoc &DL,
bool isTarget = false);
SDValue getShiftAmountConstant(uint64_t Val, EVT VT, const SDLoc &DL);
SDValue getShiftAmountConstant(const APInt &Val, EVT VT, const SDLoc &DL);
SDValue getVectorIdxConstant(uint64_t Val, const SDLoc &DL,
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6 changes: 6 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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Expand Up @@ -1787,6 +1787,12 @@ SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, const SDLoc &DL,
return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
}

SDValue SelectionDAG::getSignedIntPtrConstant(int64_t Val, const SDLoc &DL,
bool isTarget) {
return getSignedConstant(Val, DL, TLI->getPointerTy(getDataLayout()),
isTarget);
}
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@arsenm arsenm Nov 21, 2024

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Missing address space to getPointerTy

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@nikic nikic Nov 22, 2024

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This is just a signed copy of an existing API. But I just dropped it again -- it's just the one call and we already have the right VT there anyway, so there's really no benefit to having this...


SDValue SelectionDAG::getShiftAmountConstant(uint64_t Val, EVT VT,
const SDLoc &DL) {
assert(VT.isInteger() && "Shift amount is not an integer type!");
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2 changes: 1 addition & 1 deletion llvm/lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp
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Expand Up @@ -61,7 +61,7 @@ void LoongArchDAGToDAGISel::Select(SDNode *Node) {
SDValue SrcReg = CurDAG->getRegister(LoongArch::R0, GRLenVT);
// The instructions in the sequence are handled here.
for (LoongArchMatInt::Inst &Inst : LoongArchMatInt::generateInstSeq(Imm)) {
SDValue SDImm = CurDAG->getTargetConstant(Inst.Imm, DL, GRLenVT);
SDValue SDImm = CurDAG->getSignedTargetConstant(Inst.Imm, DL, GRLenVT);
switch (Inst.Opc) {
case LoongArch::LU12I_W:
Result = CurDAG->getMachineNode(Inst.Opc, DL, GRLenVT, SDImm);
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16 changes: 9 additions & 7 deletions llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
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Expand Up @@ -1533,7 +1533,7 @@ SDValue LoongArchTargetLowering::lowerFRAMEADDR(SDValue Op,
while (Depth--) {
int Offset = -(GRLenInBytes * 2);
SDValue Ptr = DAG.getNode(ISD::ADD, DL, VT, FrameAddr,
DAG.getIntPtrConstant(Offset, DL));
DAG.getSignedIntPtrConstant(Offset, DL));
FrameAddr =
DAG.getLoad(VT, DL, DAG.getEntryNode(), Ptr, MachinePointerInfo());
}
Expand Down Expand Up @@ -2548,7 +2548,8 @@ SDValue LoongArchTargetLowering::lowerShiftLeftParts(SDValue Op,

SDValue Zero = DAG.getConstant(0, DL, VT);
SDValue One = DAG.getConstant(1, DL, VT);
SDValue MinusGRLen = DAG.getConstant(-(int)Subtarget.getGRLen(), DL, VT);
SDValue MinusGRLen =
DAG.getSignedConstant(-(int)Subtarget.getGRLen(), DL, VT);
SDValue GRLenMinus1 = DAG.getConstant(Subtarget.getGRLen() - 1, DL, VT);
SDValue ShamtMinusGRLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusGRLen);
SDValue GRLenMinus1Shamt = DAG.getNode(ISD::XOR, DL, VT, Shamt, GRLenMinus1);
Expand Down Expand Up @@ -2599,7 +2600,8 @@ SDValue LoongArchTargetLowering::lowerShiftRightParts(SDValue Op,

SDValue Zero = DAG.getConstant(0, DL, VT);
SDValue One = DAG.getConstant(1, DL, VT);
SDValue MinusGRLen = DAG.getConstant(-(int)Subtarget.getGRLen(), DL, VT);
SDValue MinusGRLen =
DAG.getSignedConstant(-(int)Subtarget.getGRLen(), DL, VT);
SDValue GRLenMinus1 = DAG.getConstant(Subtarget.getGRLen() - 1, DL, VT);
SDValue ShamtMinusGRLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusGRLen);
SDValue GRLenMinus1Shamt = DAG.getNode(ISD::XOR, DL, VT, Shamt, GRLenMinus1);
Expand Down Expand Up @@ -6123,17 +6125,17 @@ void LoongArchTargetLowering::LowerAsmOperandForConstraint(
if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
uint64_t CVal = C->getSExtValue();
if (isInt<16>(CVal))
Ops.push_back(
DAG.getTargetConstant(CVal, SDLoc(Op), Subtarget.getGRLenVT()));
Ops.push_back(DAG.getSignedTargetConstant(CVal, SDLoc(Op),
Subtarget.getGRLenVT()));
}
return;
case 'I':
// Validate & create a 12-bit signed immediate operand.
if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
uint64_t CVal = C->getSExtValue();
if (isInt<12>(CVal))
Ops.push_back(
DAG.getTargetConstant(CVal, SDLoc(Op), Subtarget.getGRLenVT()));
Ops.push_back(DAG.getSignedTargetConstant(CVal, SDLoc(Op),
Subtarget.getGRLenVT()));
}
return;
case 'J':
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12 changes: 6 additions & 6 deletions llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
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Expand Up @@ -481,8 +481,8 @@ def simm12_plus1 : ImmLeaf<GRLenVT,

// Return the negation of an immediate value.
def NegImm : SDNodeXForm<imm, [{
return CurDAG->getTargetConstant(-N->getSExtValue(), SDLoc(N),
N->getValueType(0));
return CurDAG->getSignedTargetConstant(-N->getSExtValue(), SDLoc(N),
N->getValueType(0));
}]>;

// FP immediate patterns.
Expand Down Expand Up @@ -538,16 +538,16 @@ def AddiPair : PatLeaf<(imm), [{
// Return -2048 if immediate is negative or 2047 if positive.
def AddiPairImmLarge : SDNodeXForm<imm, [{
int64_t Imm = N->getSExtValue() < 0 ? -2048 : 2047;
return CurDAG->getTargetConstant(Imm, SDLoc(N),
N->getValueType(0));
return CurDAG->getSignedTargetConstant(Imm, SDLoc(N),
N->getValueType(0));
}]>;

// Return imm - (imm < 0 ? -2048 : 2047).
def AddiPairImmSmall : SDNodeXForm<imm, [{
int64_t Imm = N->getSExtValue();
int64_t Adj = Imm < 0 ? -2048 : 2047;
return CurDAG->getTargetConstant(Imm - Adj, SDLoc(N),
N->getValueType(0));
return CurDAG->getSignedTargetConstant(Imm - Adj, SDLoc(N),
N->getValueType(0));
}]>;

// Check if (mul r, imm) can be optimized to (SLLI (ALSL r, r, i0), i1),
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6 changes: 4 additions & 2 deletions llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
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Expand Up @@ -223,12 +223,14 @@ def f64imm_vldi : PatLeaf<(fpimm), [{
def to_f32imm_vldi : SDNodeXForm<fpimm, [{
uint64_t x = N->getValueAPF().bitcastToAPInt().getZExtValue();
x = (0b11011 << 8) | (((x >> 24) & 0xc0) ^ 0x40) | ((x >> 19) & 0x3f);
return CurDAG->getTargetConstant(SignExtend32<13>(x), SDLoc(N), MVT::i32);
return CurDAG->getSignedTargetConstant(SignExtend32<13>(x), SDLoc(N),
MVT::i32);
}]>;
def to_f64imm_vldi : SDNodeXForm<fpimm, [{
uint64_t x = N->getValueAPF().bitcastToAPInt().getZExtValue();
x = (0b11100 << 8) | (((x >> 56) & 0xc0) ^ 0x40) | ((x >> 48) & 0x3f);
return CurDAG->getTargetConstant(SignExtend32<13>(x), SDLoc(N), MVT::i32);
return CurDAG->getSignedTargetConstant(SignExtend32<13>(x), SDLoc(N),
MVT::i32);
}]>;

//===----------------------------------------------------------------------===//
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