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[CodeGenPrepare] Drop nsw flags in optimizeLoadExt #118180

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Merged
merged 2 commits into from
Dec 1, 2024
Merged

[CodeGenPrepare] Drop nsw flags in optimizeLoadExt #118180

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8583154
[CodeGenPrepare] Add pre-commit tests. NFC.
dtcxzyw Nov 30, 2024
f43daa3
[CodeGenPrepare] Drop nsw flags in `optimizeLoadExt`
dtcxzyw Nov 30, 2024
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7 changes: 7 additions & 0 deletions llvm/lib/CodeGen/CodeGenPrepare.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -7138,6 +7138,7 @@ bool CodeGenPrepare::optimizeLoadExt(LoadInst *Load) {
SmallVector<Instruction *, 8> WorkList;
SmallPtrSet<Instruction *, 16> Visited;
SmallVector<Instruction *, 8> AndsToMaybeRemove;
SmallVector<Instruction *, 8> DropFlags;
for (auto *U : Load->users())
WorkList.push_back(cast<Instruction>(U));

Expand Down Expand Up @@ -7185,13 +7186,15 @@ bool CodeGenPrepare::optimizeLoadExt(LoadInst *Load) {
return false;
uint64_t ShiftAmt = ShlC->getLimitedValue(BitWidth - 1);
DemandBits.setLowBits(BitWidth - ShiftAmt);
DropFlags.push_back(I);
break;
}

case Instruction::Trunc: {
EVT TruncVT = TLI->getValueType(*DL, I->getType());
unsigned TruncBitWidth = TruncVT.getSizeInBits();
DemandBits.setLowBits(TruncBitWidth);
DropFlags.push_back(I);
break;
}

Expand Down Expand Up @@ -7249,6 +7252,10 @@ bool CodeGenPrepare::optimizeLoadExt(LoadInst *Load) {
++NumAndUses;
}

// NSW flags may not longer hold.
for (auto *Inst : DropFlags)
Inst->setHasNoSignedWrap(false);

++NumAndsAdded;
return true;
}
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86 changes: 86 additions & 0 deletions llvm/test/Transforms/CodeGenPrepare/X86/pr118172.ll
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@@ -0,0 +1,86 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=x86_64-unknown-unknown < %s | FileCheck %s

; Make sure the nsw flag is dropped when the load ext is combined.
define i32 @simplify_load_ext_drop_trunc_nsw(ptr %p) {
; CHECK-LABEL: define i32 @simplify_load_ext_drop_trunc_nsw(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[X]], 255
; CHECK-NEXT: [[TRUNC:%.*]] = trunc i32 [[TMP0]] to i8
; CHECK-NEXT: [[EXT1:%.*]] = sext i8 [[TRUNC]] to i16
; CHECK-NEXT: call void @use(i32 [[TMP0]])
; CHECK-NEXT: [[EXT2:%.*]] = zext i16 [[EXT1]] to i32
; CHECK-NEXT: ret i32 [[EXT2]]
;
entry:
%x = load i32, ptr %p, align 4
%trunc = trunc nsw i32 %x to i8
%ext1 = sext i8 %trunc to i16
%conv2 = and i32 %x, 255
call void @use(i32 %conv2)
%ext2 = zext i16 %ext1 to i32
ret i32 %ext2
}

; Make sure the nsw flag is dropped when the load ext is combined.
define i32 @simplify_load_ext_drop_shl_nsw(ptr %p) {
; CHECK-LABEL: define i32 @simplify_load_ext_drop_shl_nsw(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[X]], 255
; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[TMP0]], 24
; CHECK-NEXT: call void @use(i32 [[TMP0]])
; CHECK-NEXT: ret i32 [[SHL]]
;
entry:
%x = load i32, ptr %p, align 4
%shl = shl nsw i32 %x, 24
%conv2 = and i32 %x, 255
call void @use(i32 %conv2)
ret i32 %shl
}

define i32 @simplify_load_ext_keep_trunc_nuw(ptr %p) {
; CHECK-LABEL: define i32 @simplify_load_ext_keep_trunc_nuw(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[X]], 255
; CHECK-NEXT: [[TRUNC:%.*]] = trunc nuw i32 [[TMP0]] to i8
; CHECK-NEXT: [[EXT1:%.*]] = sext i8 [[TRUNC]] to i16
; CHECK-NEXT: call void @use(i32 [[TMP0]])
; CHECK-NEXT: [[EXT2:%.*]] = zext i16 [[EXT1]] to i32
; CHECK-NEXT: ret i32 [[EXT2]]
;
entry:
%x = load i32, ptr %p, align 4
%trunc = trunc nuw i32 %x to i8
%ext1 = sext i8 %trunc to i16
%conv2 = and i32 %x, 255
call void @use(i32 %conv2)
%ext2 = zext i16 %ext1 to i32
ret i32 %ext2
}

define i32 @simplify_load_ext_drop_shl_nuw(ptr %p) {
; CHECK-LABEL: define i32 @simplify_load_ext_drop_shl_nuw(
; CHECK-SAME: ptr [[P:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[X:%.*]] = load i32, ptr [[P]], align 4
; CHECK-NEXT: [[TMP0:%.*]] = and i32 [[X]], 255
; CHECK-NEXT: [[SHL:%.*]] = shl nuw i32 [[TMP0]], 24
; CHECK-NEXT: call void @use(i32 [[TMP0]])
; CHECK-NEXT: ret i32 [[SHL]]
;
entry:
%x = load i32, ptr %p, align 4
%shl = shl nuw i32 %x, 24
%conv2 = and i32 %x, 255
call void @use(i32 %conv2)
ret i32 %shl
}

declare void @use(i32)