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[InstCombine] Simplify add nsw/nuw i1 to or disjoint i1 #118221

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[InstCombine] Simplify add nsw/nuw i1 to or disjoint i1 #118221

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5 changes: 4 additions & 1 deletion llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1549,8 +1549,11 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
I.hasNoUnsignedWrap()))
return R;
Type *Ty = I.getType();
if (Ty->isIntOrIntVectorTy(1))
if (Ty->isIntOrIntVectorTy(1)) {
if (I.hasNoUnsignedWrap() || I.hasNoSignedWrap())
return BinaryOperator::CreateDisjoint(Instruction::Or, LHS, RHS);
return BinaryOperator::CreateXor(LHS, RHS);
}

// X + X --> X << 1
if (LHS == RHS) {
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18 changes: 18 additions & 0 deletions llvm/test/Transforms/InstCombine/add2.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -498,3 +498,21 @@ define i32 @sub_undemanded_low_bits(i32 %x) {
%shr = lshr i32 %sub, 4
ret i32 %shr
}

define i1 @add_nuw_i1(i1 %x, i1 %y) {
; CHECK-LABEL: @add_nuw_i1(
; CHECK-NEXT: [[Z:%.*]] = or disjoint i1 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[Z]]
;
%z = add nuw i1 %x, %y
ret i1 %z
}

define i1 @add_nsw_i1(i1 %x, i1 %y) {
; CHECK-LABEL: @add_nsw_i1(
; CHECK-NEXT: [[Z:%.*]] = or disjoint i1 [[X:%.*]], [[Y:%.*]]
; CHECK-NEXT: ret i1 [[Z]]
;
%z = add nsw i1 %x, %y
ret i1 %z
}