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39 changes: 39 additions & 0 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -13857,6 +13857,37 @@ static SDValue getMad64_32(SelectionDAG &DAG, const SDLoc &SL, EVT VT,
return DAG.getNode(ISD::TRUNCATE, SL, VT, Mad);
}

// Fold
// y = lshr i64 x, 32
// res = add (mul i64 y, Const), x where "Const" is a 64-bit constant
// with Const.hi == -1
// To
// res = mad_u64_u32 y.lo ,Const.lo, x.lo
static SDValue tryFoldMADwithSRL(SelectionDAG &DAG, const SDLoc &SL,
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Can you also implement the same in globalisel? Not sure if the original combine is there, or if that needs porting as well

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sure, it seems original combine needs porting

SDValue MulLHS, SDValue MulRHS,
SDValue AddRHS) {

if (MulLHS.getValueType() != MVT::i64 || MulLHS.getOpcode() != ISD::SRL)
return SDValue();

ConstantSDNode *ShiftVal = dyn_cast<ConstantSDNode>(MulLHS.getOperand(1));
if (!ShiftVal || MulLHS.getOperand(0) != AddRHS)
return SDValue();

if (ShiftVal->getAsZExtVal() != 32)
return SDValue();

APInt Const = dyn_cast<ConstantSDNode>(MulRHS.getNode())->getAPIntValue();
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Need to check that MulRHS is a constant before calling getAPIntValue.

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The previous checks (including those at the callsite of this function) make sure the MulRHS is always a ConstantSDNode. so I guess checking should not be necessary

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You shouldn't be splitting the logic this way, and you should never have an unchecked dyn_cast.

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fixed

if (!Const.isNegative() || !Const.isSignedIntN(33))
return SDValue();

SDValue ConstMul =
DAG.getConstant(Const.getZExtValue() & 0x00000000FFFFFFFF, SL, MVT::i32);
return getMad64_32(DAG, SL, MVT::i64,
DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, MulLHS), ConstMul,
DAG.getZeroExtendInReg(AddRHS, SL, MVT::i32), false);
}

// Fold (add (mul x, y), z) --> (mad_[iu]64_[iu]32 x, y, z) plus high
// multiplies, if any.
//
Expand Down Expand Up @@ -13915,6 +13946,14 @@ SDValue SITargetLowering::tryFoldToMad64_32(SDNode *N,
SDValue MulRHS = LHS.getOperand(1);
SDValue AddRHS = RHS;

if (isa<ConstantSDNode>(MulLHS) || isa<ConstantSDNode>(MulRHS)) {
if (MulRHS.getOpcode() == ISD::SRL)
std::swap(MulLHS, MulRHS);
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Sink all the logic into the implementation

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done


if (SDValue FoldedMAD = tryFoldMADwithSRL(DAG, SL, MulLHS, MulRHS, AddRHS))
return FoldedMAD;
}

// Always check whether operands are small unsigned values, since that
// knowledge is useful in more cases. Check for small signed values only if
// doing so can unlock a shorter code sequence.
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