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[AMDGPU][True16][MC] test update for v_max_f16/v_min_f16 in true16 #119291

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Merged
broxigarchen merged 1 commit into from
Dec 17, 2024
Merged

[AMDGPU][True16][MC] test update for v_max_f16/v_min_f16 in true16 #119291

broxigarchen merged 1 commit into from
Dec 17, 2024

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@broxigarchen broxigarchen commented Dec 9, 2024

This is a NFC change. Update mc test for v_max/min_f16 in true16 format.

MC source change was done by previous patch and automatically enabled by t16 pesudo

@broxigarchen broxigarchen marked this pull request as ready for review December 9, 2024 23:47
@llvmbot llvmbot added backend:AMDGPU llvm:mc Machine (object) code labels Dec 9, 2024
@broxigarchen broxigarchen requested a review from arsenm December 9, 2024 23:47
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llvmbot commented Dec 9, 2024

@llvm/pr-subscribers-mc

Author: Brox Chen (broxigarchen)

Changes

This is a NFC change. Update mc test for v_max/min_f16 in true16 format.

MC source change was done by previous patch and automatically enabled by t16 pesudo

Patch is 76.82 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119291.diff

9 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/VOP2Instructions.td (+2-4)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2.s (+90-60)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s (+74-56)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s (+30-12)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s (+90-36)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s (+90-36)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s (+80-56)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s (+40-16)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s (+78-60)
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index 384fec0079a5d9..c70663e4a43cb8 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -1827,10 +1827,8 @@ defm V_MUL_F16_fake16      : VOP2_Real_FULL_t16_gfx11_gfx12<0x035, "v_mul_f16">;
 defm V_FMAC_F16            : VOP2_Real_FULL_t16_and_fake16_gfx11_gfx12<0x036, "v_fmac_f16">;
 defm V_LDEXP_F16_t16       : VOP2_Real_FULL_t16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
 defm V_LDEXP_F16_fake16    : VOP2_Real_FULL_t16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
-defm V_MAX_F16_t16         : VOP2_Real_FULL_t16_gfx11<0x039, "v_max_f16">;
-defm V_MAX_F16_fake16      : VOP2_Real_FULL_t16_gfx11<0x039, "v_max_f16">;
-defm V_MIN_F16_t16         : VOP2_Real_FULL_t16_gfx11<0x03a, "v_min_f16">;
-defm V_MIN_F16_fake16      : VOP2_Real_FULL_t16_gfx11<0x03a, "v_min_f16">;
+defm V_MAX_F16             : VOP2_Real_FULL_t16_and_fake16_gfx11<0x039, "v_max_f16">;
+defm V_MIN_F16             : VOP2_Real_FULL_t16_and_fake16_gfx11<0x03a, "v_min_f16">;
 defm V_FMAMK_F16           : VOP2Only_Real_MADK_t16_and_fake16_gfx11_gfx12<0x037, "v_fmamk_f16">;
 defm V_FMAAK_F16           : VOP2Only_Real_MADK_t16_and_fake16_gfx11_gfx12<0x038, "v_fmaak_f16">;
 
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
index cb7b71935e22ae..5f84ef22b73e63 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
@@ -1177,50 +1177,65 @@ v_lshrrev_b32 v5, src_scc, v2
 v_lshrrev_b32 v255, 0xaf123456, v255
 // GFX11: v_lshrrev_b32_e32 v255, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x33,0x56,0x34,0x12,0xaf]
 
-v_max_f16 v5, v1, v2
-// GFX11: v_max_f16_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x72]
+v_max_f16 v5.l, v1.l, v2.l
+// GFX11: v_max_f16_e32 v5.l, v1.l, v2.l          ; encoding: [0x01,0x05,0x0a,0x72]
 
-v_max_f16 v5, v127, v2
-// GFX11: v_max_f16_e32 v5, v127, v2              ; encoding: [0x7f,0x05,0x0a,0x72]
+v_max_f16 v5.l, v127.l, v2.l
+// GFX11: v_max_f16_e32 v5.l, v127.l, v2.l        ; encoding: [0x7f,0x05,0x0a,0x72]
 
-v_max_f16 v5, s1, v2
-// GFX11: v_max_f16_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x72]
+v_max_f16 v5.l, s1, v2.l
+// GFX11: v_max_f16_e32 v5.l, s1, v2.l            ; encoding: [0x01,0x04,0x0a,0x72]
 
-v_max_f16 v5, s105, v2
-// GFX11: v_max_f16_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x72]
+v_max_f16 v5.l, s105, v2.l
+// GFX11: v_max_f16_e32 v5.l, s105, v2.l          ; encoding: [0x69,0x04,0x0a,0x72]
 
-v_max_f16 v5, vcc_lo, v2
-// GFX11: v_max_f16_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x72]
+v_max_f16 v5.l, vcc_lo, v2.l
+// GFX11: v_max_f16_e32 v5.l, vcc_lo, v2.l        ; encoding: [0x6a,0x04,0x0a,0x72]
 
-v_max_f16 v5, vcc_hi, v2
-// GFX11: v_max_f16_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x72]
+v_max_f16 v5.l, vcc_hi, v2.l
+// GFX11: v_max_f16_e32 v5.l, vcc_hi, v2.l        ; encoding: [0x6b,0x04,0x0a,0x72]
 
-v_max_f16 v5, ttmp15, v2
-// GFX11: v_max_f16_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x72]
+v_max_f16 v5.l, ttmp15, v2.l
+// GFX11: v_max_f16_e32 v5.l, ttmp15, v2.l        ; encoding: [0x7b,0x04,0x0a,0x72]
 
-v_max_f16 v5, m0, v2
-// GFX11: v_max_f16_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x72]
+v_max_f16 v5.l, m0, v2.l
+// GFX11: v_max_f16_e32 v5.l, m0, v2.l            ; encoding: [0x7d,0x04,0x0a,0x72]
 
-v_max_f16 v5, exec_lo, v2
-// GFX11: v_max_f16_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x72]
+v_max_f16 v5.l, exec_lo, v2.l
+// GFX11: v_max_f16_e32 v5.l, exec_lo, v2.l       ; encoding: [0x7e,0x04,0x0a,0x72]
 
-v_max_f16 v5, exec_hi, v2
-// GFX11: v_max_f16_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x72]
+v_max_f16 v5.l, exec_hi, v2.l
+// GFX11: v_max_f16_e32 v5.l, exec_hi, v2.l       ; encoding: [0x7f,0x04,0x0a,0x72]
 
-v_max_f16 v5, null, v2
-// GFX11: v_max_f16_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x72]
+v_max_f16 v5.l, null, v2.l
+// GFX11: v_max_f16_e32 v5.l, null, v2.l          ; encoding: [0x7c,0x04,0x0a,0x72]
 
-v_max_f16 v5, -1, v2
-// GFX11: v_max_f16_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x72]
+v_max_f16 v5.l, -1, v2.l
+// GFX11: v_max_f16_e32 v5.l, -1, v2.l            ; encoding: [0xc1,0x04,0x0a,0x72]
 
-v_max_f16 v5, 0.5, v2
-// GFX11: v_max_f16_e32 v5, 0.5, v2               ; encoding: [0xf0,0x04,0x0a,0x72]
+v_max_f16 v5.l, 0.5, v2.l
+// GFX11: v_max_f16_e32 v5.l, 0.5, v2.l           ; encoding: [0xf0,0x04,0x0a,0x72]
 
-v_max_f16 v5, src_scc, v2
-// GFX11: v_max_f16_e32 v5, src_scc, v2           ; encoding: [0xfd,0x04,0x0a,0x72]
+v_max_f16 v5.l, src_scc, v2.l
+// GFX11: v_max_f16_e32 v5.l, src_scc, v2.l       ; encoding: [0xfd,0x04,0x0a,0x72]
 
-v_max_f16 v127, 0xfe0b, v127
-// GFX11: v_max_f16_e32 v127, 0xfe0b, v127        ; encoding: [0xff,0xfe,0xfe,0x72,0x0b,0xfe,0x00,0x00]
+v_max_f16 v127.l, 0xfe0b, v127.l
+// GFX11: v_max_f16_e32 v127.l, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0xfe,0x72,0x0b,0xfe,0x00,0x00]
+
+v_max_f16 v5.l, v1.h, v2.l
+// GFX11: v_max_f16_e32 v5.l, v1.h, v2.l          ; encoding: [0x81,0x05,0x0a,0x72]
+
+v_max_f16 v5.l, v127.h, v2.l
+// GFX11: v_max_f16_e32 v5.l, v127.h, v2.l        ; encoding: [0xff,0x05,0x0a,0x72]
+
+v_max_f16 v127.l, 0.5, v127.l
+// GFX11: v_max_f16_e32 v127.l, 0.5, v127.l       ; encoding: [0xf0,0xfe,0xfe,0x72]
+
+v_max_f16 v5.h, src_scc, v2.h
+// GFX11: v_max_f16_e32 v5.h, src_scc, v2.h       ; encoding: [0xfd,0x04,0x0b,0x73]
+
+v_max_f16 v127.h, 0xfe0b, v127.h
+// GFX11: v_max_f16_e32 v127.h, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0xff,0x73,0x0b,0xfe,0x00,0x00]
 
 v_max_f32 v5, v1, v2
 // GFX11: v_max_f32_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x20]
@@ -1357,50 +1372,65 @@ v_max_u32 v5, src_scc, v2
 v_max_u32 v255, 0xaf123456, v255
 // GFX11: v_max_u32_e32 v255, 0xaf123456, v255    ; encoding: [0xff,0xfe,0xff,0x29,0x56,0x34,0x12,0xaf]
 
-v_min_f16 v5, v1, v2
-// GFX11: v_min_f16_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x74]
+v_min_f16 v5.l, v1.l, v2.l
+// GFX11: v_min_f16_e32 v5.l, v1.l, v2.l          ; encoding: [0x01,0x05,0x0a,0x74]
+
+v_min_f16 v5.l, v127.l, v2.l
+// GFX11: v_min_f16_e32 v5.l, v127.l, v2.l        ; encoding: [0x7f,0x05,0x0a,0x74]
+
+v_min_f16 v5.l, s1, v2.l
+// GFX11: v_min_f16_e32 v5.l, s1, v2.l            ; encoding: [0x01,0x04,0x0a,0x74]
+
+v_min_f16 v5.l, s105, v2.l
+// GFX11: v_min_f16_e32 v5.l, s105, v2.l          ; encoding: [0x69,0x04,0x0a,0x74]
+
+v_min_f16 v5.l, vcc_lo, v2.l
+// GFX11: v_min_f16_e32 v5.l, vcc_lo, v2.l        ; encoding: [0x6a,0x04,0x0a,0x74]
+
+v_min_f16 v5.l, vcc_hi, v2.l
+// GFX11: v_min_f16_e32 v5.l, vcc_hi, v2.l        ; encoding: [0x6b,0x04,0x0a,0x74]
 
-v_min_f16 v5, v127, v2
-// GFX11: v_min_f16_e32 v5, v127, v2              ; encoding: [0x7f,0x05,0x0a,0x74]
+v_min_f16 v5.l, ttmp15, v2.l
+// GFX11: v_min_f16_e32 v5.l, ttmp15, v2.l        ; encoding: [0x7b,0x04,0x0a,0x74]
 
-v_min_f16 v5, s1, v2
-// GFX11: v_min_f16_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x74]
+v_min_f16 v5.l, m0, v2.l
+// GFX11: v_min_f16_e32 v5.l, m0, v2.l            ; encoding: [0x7d,0x04,0x0a,0x74]
 
-v_min_f16 v5, s105, v2
-// GFX11: v_min_f16_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x74]
+v_min_f16 v5.l, exec_lo, v2.l
+// GFX11: v_min_f16_e32 v5.l, exec_lo, v2.l       ; encoding: [0x7e,0x04,0x0a,0x74]
 
-v_min_f16 v5, vcc_lo, v2
-// GFX11: v_min_f16_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x74]
+v_min_f16 v5.l, exec_hi, v2.l
+// GFX11: v_min_f16_e32 v5.l, exec_hi, v2.l       ; encoding: [0x7f,0x04,0x0a,0x74]
 
-v_min_f16 v5, vcc_hi, v2
-// GFX11: v_min_f16_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x74]
+v_min_f16 v5.l, null, v2.l
+// GFX11: v_min_f16_e32 v5.l, null, v2.l          ; encoding: [0x7c,0x04,0x0a,0x74]
 
-v_min_f16 v5, ttmp15, v2
-// GFX11: v_min_f16_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x74]
+v_min_f16 v5.l, -1, v2.l
+// GFX11: v_min_f16_e32 v5.l, -1, v2.l            ; encoding: [0xc1,0x04,0x0a,0x74]
 
-v_min_f16 v5, m0, v2
-// GFX11: v_min_f16_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x74]
+v_min_f16 v5.l, 0.5, v2.l
+// GFX11: v_min_f16_e32 v5.l, 0.5, v2.l           ; encoding: [0xf0,0x04,0x0a,0x74]
 
-v_min_f16 v5, exec_lo, v2
-// GFX11: v_min_f16_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x74]
+v_min_f16 v5.l, src_scc, v2.l
+// GFX11: v_min_f16_e32 v5.l, src_scc, v2.l       ; encoding: [0xfd,0x04,0x0a,0x74]
 
-v_min_f16 v5, exec_hi, v2
-// GFX11: v_min_f16_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x74]
+v_min_f16 v127.l, 0xfe0b, v127.l
+// GFX11: v_min_f16_e32 v127.l, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0xfe,0x74,0x0b,0xfe,0x00,0x00]
 
-v_min_f16 v5, null, v2
-// GFX11: v_min_f16_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x74]
+v_min_f16 v5.l, v1.h, v2.l
+// GFX11: v_min_f16_e32 v5.l, v1.h, v2.l          ; encoding: [0x81,0x05,0x0a,0x74]
 
-v_min_f16 v5, -1, v2
-// GFX11: v_min_f16_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x74]
+v_min_f16 v5.l, v127.h, v2.l
+// GFX11: v_min_f16_e32 v5.l, v127.h, v2.l        ; encoding: [0xff,0x05,0x0a,0x74]
 
-v_min_f16 v5, 0.5, v2
-// GFX11: v_min_f16_e32 v5, 0.5, v2               ; encoding: [0xf0,0x04,0x0a,0x74]
+v_min_f16 v127.l, 0.5, v127.l
+// GFX11: v_min_f16_e32 v127.l, 0.5, v127.l       ; encoding: [0xf0,0xfe,0xfe,0x74]
 
-v_min_f16 v5, src_scc, v2
-// GFX11: v_min_f16_e32 v5, src_scc, v2           ; encoding: [0xfd,0x04,0x0a,0x74]
+v_min_f16 v5.h, src_scc, v2.h
+// GFX11: v_min_f16_e32 v5.h, src_scc, v2.h       ; encoding: [0xfd,0x04,0x0b,0x75]
 
-v_min_f16 v127, 0xfe0b, v127
-// GFX11: v_min_f16_e32 v127, 0xfe0b, v127        ; encoding: [0xff,0xfe,0xfe,0x74,0x0b,0xfe,0x00,0x00]
+v_min_f16 v127.h, 0xfe0b, v127.h
+// GFX11: v_min_f16_e32 v127.h, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0xff,0x75,0x0b,0xfe,0x00,0x00]
 
 v_min_f32 v5, v1, v2
 // GFX11: v_min_f32_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x1e]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
index 00353c4cdcb496..151784b1646aed 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
@@ -849,47 +849,56 @@ v_lshrrev_b32 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:
 v_lshrrev_b32 v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_lshrrev_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x33,0xff,0x6f,0x05,0x30]
 
-v_max_f16 v5, v1, v2 quad_perm:[3,2,1,0]
-// GFX11: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff]
+v_max_f16 v5.l, v1.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff]
 
-v_max_f16 v5, v1, v2 quad_perm:[0,1,2,3]
-// GFX11: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff]
+v_max_f16 v5.l, v1.l, v2.l quad_perm:[0,1,2,3]
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff]
 
-v_max_f16 v5, v1, v2 row_mirror
-// GFX11: v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_mirror
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_half_mirror
-// GFX11: v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_half_mirror
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shl:1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shl:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shl:15
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shl:15
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shr:1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shr:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shr:15
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shr:15
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_ror:1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_ror:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_ror:15
-// GFX11: v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_ror:15
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// GFX11: v_max_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01]
+v_max_f16 v5.l, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01]
 
-v_max_f16 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// GFX11: v_max_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x60,0x09,0x13]
+v_max_f16 v5.l, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x60,0x09,0x13]
 
-v_max_f16 v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_max_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xf5,0x30]
+v_max_f16 v127.l, -|v127.l|, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// GFX11: v_max_f16_dpp v127.l, -|v127.l|, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xf5,0x30]
+
+v_max_f16 v127.l, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// GFX11: v_max_f16_dpp v127.l, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x5f,0x01,0x01]
+
+v_max_f16 v5.h, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// GFX11: v_max_f16_dpp v5.h, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0b,0x73,0x81,0x60,0x09,0x13]
+
+v_max_f16 v127.h, -|v127.h|, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_max_f16_dpp v127.h, -|v127.h|, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x73,0xff,0x6f,0xf5,0x30]
 
 v_max_f32 v5, v1, v2 quad_perm:[3,2,1,0]
 // GFX11: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0xff]
@@ -1017,47 +1026,56 @@ v_max_u32 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
 v_max_u32 v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_max_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x29,0xff,0x6f,0x05,0x30]
 
-v_min_f16 v5, v1, v2 quad_perm:[3,2,1,0]
-// GFX11: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff]
+v_min_f16 v5.l, v1.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff]
+
+v_min_f16 v5.l, v1.l, v2.l quad_perm:[0,1,2,3]
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff]
+
+v_min_f16 v5.l, v1.l, v2.l row_mirror
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff]
+
+v_min_f16 v5.l, v1.l, v2.l row_half_mirror
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff]
 
-v_min_f16 v5, v1, v2 quad_perm:[0,1,2,3]
-// GFX11: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shl:1
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_mirror
-// GFX11: v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shl:15
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_half_mirror
-// GFX11: v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shr:1
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shl:1
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shr:15
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shl:15
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_ror:1
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shr:1
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_ror:15
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shr:15
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x50,0x01,0xff]
 
-v_min_f16...
[truncated]

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llvmbot commented Dec 9, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Brox Chen (broxigarchen)

Changes

This is a NFC change. Update mc test for v_max/min_f16 in true16 format.

MC source change was done by previous patch and automatically enabled by t16 pesudo

Patch is 76.82 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119291.diff

9 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/VOP2Instructions.td (+2-4)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2.s (+90-60)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s (+74-56)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp8.s (+30-12)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_err.s (+90-36)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop2_t16_promote.s (+90-36)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop2.s (+80-56)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop2.s (+40-16)
  • (modified) llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop2.s (+78-60)
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index 384fec0079a5d9..c70663e4a43cb8 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -1827,10 +1827,8 @@ defm V_MUL_F16_fake16      : VOP2_Real_FULL_t16_gfx11_gfx12<0x035, "v_mul_f16">;
 defm V_FMAC_F16            : VOP2_Real_FULL_t16_and_fake16_gfx11_gfx12<0x036, "v_fmac_f16">;
 defm V_LDEXP_F16_t16       : VOP2_Real_FULL_t16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
 defm V_LDEXP_F16_fake16    : VOP2_Real_FULL_t16_gfx11_gfx12<0x03b, "v_ldexp_f16">;
-defm V_MAX_F16_t16         : VOP2_Real_FULL_t16_gfx11<0x039, "v_max_f16">;
-defm V_MAX_F16_fake16      : VOP2_Real_FULL_t16_gfx11<0x039, "v_max_f16">;
-defm V_MIN_F16_t16         : VOP2_Real_FULL_t16_gfx11<0x03a, "v_min_f16">;
-defm V_MIN_F16_fake16      : VOP2_Real_FULL_t16_gfx11<0x03a, "v_min_f16">;
+defm V_MAX_F16             : VOP2_Real_FULL_t16_and_fake16_gfx11<0x039, "v_max_f16">;
+defm V_MIN_F16             : VOP2_Real_FULL_t16_and_fake16_gfx11<0x03a, "v_min_f16">;
 defm V_FMAMK_F16           : VOP2Only_Real_MADK_t16_and_fake16_gfx11_gfx12<0x037, "v_fmamk_f16">;
 defm V_FMAAK_F16           : VOP2Only_Real_MADK_t16_and_fake16_gfx11_gfx12<0x038, "v_fmaak_f16">;
 
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
index cb7b71935e22ae..5f84ef22b73e63 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2.s
@@ -1177,50 +1177,65 @@ v_lshrrev_b32 v5, src_scc, v2
 v_lshrrev_b32 v255, 0xaf123456, v255
 // GFX11: v_lshrrev_b32_e32 v255, 0xaf123456, v255 ; encoding: [0xff,0xfe,0xff,0x33,0x56,0x34,0x12,0xaf]
 
-v_max_f16 v5, v1, v2
-// GFX11: v_max_f16_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x72]
+v_max_f16 v5.l, v1.l, v2.l
+// GFX11: v_max_f16_e32 v5.l, v1.l, v2.l          ; encoding: [0x01,0x05,0x0a,0x72]
 
-v_max_f16 v5, v127, v2
-// GFX11: v_max_f16_e32 v5, v127, v2              ; encoding: [0x7f,0x05,0x0a,0x72]
+v_max_f16 v5.l, v127.l, v2.l
+// GFX11: v_max_f16_e32 v5.l, v127.l, v2.l        ; encoding: [0x7f,0x05,0x0a,0x72]
 
-v_max_f16 v5, s1, v2
-// GFX11: v_max_f16_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x72]
+v_max_f16 v5.l, s1, v2.l
+// GFX11: v_max_f16_e32 v5.l, s1, v2.l            ; encoding: [0x01,0x04,0x0a,0x72]
 
-v_max_f16 v5, s105, v2
-// GFX11: v_max_f16_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x72]
+v_max_f16 v5.l, s105, v2.l
+// GFX11: v_max_f16_e32 v5.l, s105, v2.l          ; encoding: [0x69,0x04,0x0a,0x72]
 
-v_max_f16 v5, vcc_lo, v2
-// GFX11: v_max_f16_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x72]
+v_max_f16 v5.l, vcc_lo, v2.l
+// GFX11: v_max_f16_e32 v5.l, vcc_lo, v2.l        ; encoding: [0x6a,0x04,0x0a,0x72]
 
-v_max_f16 v5, vcc_hi, v2
-// GFX11: v_max_f16_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x72]
+v_max_f16 v5.l, vcc_hi, v2.l
+// GFX11: v_max_f16_e32 v5.l, vcc_hi, v2.l        ; encoding: [0x6b,0x04,0x0a,0x72]
 
-v_max_f16 v5, ttmp15, v2
-// GFX11: v_max_f16_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x72]
+v_max_f16 v5.l, ttmp15, v2.l
+// GFX11: v_max_f16_e32 v5.l, ttmp15, v2.l        ; encoding: [0x7b,0x04,0x0a,0x72]
 
-v_max_f16 v5, m0, v2
-// GFX11: v_max_f16_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x72]
+v_max_f16 v5.l, m0, v2.l
+// GFX11: v_max_f16_e32 v5.l, m0, v2.l            ; encoding: [0x7d,0x04,0x0a,0x72]
 
-v_max_f16 v5, exec_lo, v2
-// GFX11: v_max_f16_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x72]
+v_max_f16 v5.l, exec_lo, v2.l
+// GFX11: v_max_f16_e32 v5.l, exec_lo, v2.l       ; encoding: [0x7e,0x04,0x0a,0x72]
 
-v_max_f16 v5, exec_hi, v2
-// GFX11: v_max_f16_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x72]
+v_max_f16 v5.l, exec_hi, v2.l
+// GFX11: v_max_f16_e32 v5.l, exec_hi, v2.l       ; encoding: [0x7f,0x04,0x0a,0x72]
 
-v_max_f16 v5, null, v2
-// GFX11: v_max_f16_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x72]
+v_max_f16 v5.l, null, v2.l
+// GFX11: v_max_f16_e32 v5.l, null, v2.l          ; encoding: [0x7c,0x04,0x0a,0x72]
 
-v_max_f16 v5, -1, v2
-// GFX11: v_max_f16_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x72]
+v_max_f16 v5.l, -1, v2.l
+// GFX11: v_max_f16_e32 v5.l, -1, v2.l            ; encoding: [0xc1,0x04,0x0a,0x72]
 
-v_max_f16 v5, 0.5, v2
-// GFX11: v_max_f16_e32 v5, 0.5, v2               ; encoding: [0xf0,0x04,0x0a,0x72]
+v_max_f16 v5.l, 0.5, v2.l
+// GFX11: v_max_f16_e32 v5.l, 0.5, v2.l           ; encoding: [0xf0,0x04,0x0a,0x72]
 
-v_max_f16 v5, src_scc, v2
-// GFX11: v_max_f16_e32 v5, src_scc, v2           ; encoding: [0xfd,0x04,0x0a,0x72]
+v_max_f16 v5.l, src_scc, v2.l
+// GFX11: v_max_f16_e32 v5.l, src_scc, v2.l       ; encoding: [0xfd,0x04,0x0a,0x72]
 
-v_max_f16 v127, 0xfe0b, v127
-// GFX11: v_max_f16_e32 v127, 0xfe0b, v127        ; encoding: [0xff,0xfe,0xfe,0x72,0x0b,0xfe,0x00,0x00]
+v_max_f16 v127.l, 0xfe0b, v127.l
+// GFX11: v_max_f16_e32 v127.l, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0xfe,0x72,0x0b,0xfe,0x00,0x00]
+
+v_max_f16 v5.l, v1.h, v2.l
+// GFX11: v_max_f16_e32 v5.l, v1.h, v2.l          ; encoding: [0x81,0x05,0x0a,0x72]
+
+v_max_f16 v5.l, v127.h, v2.l
+// GFX11: v_max_f16_e32 v5.l, v127.h, v2.l        ; encoding: [0xff,0x05,0x0a,0x72]
+
+v_max_f16 v127.l, 0.5, v127.l
+// GFX11: v_max_f16_e32 v127.l, 0.5, v127.l       ; encoding: [0xf0,0xfe,0xfe,0x72]
+
+v_max_f16 v5.h, src_scc, v2.h
+// GFX11: v_max_f16_e32 v5.h, src_scc, v2.h       ; encoding: [0xfd,0x04,0x0b,0x73]
+
+v_max_f16 v127.h, 0xfe0b, v127.h
+// GFX11: v_max_f16_e32 v127.h, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0xff,0x73,0x0b,0xfe,0x00,0x00]
 
 v_max_f32 v5, v1, v2
 // GFX11: v_max_f32_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x20]
@@ -1357,50 +1372,65 @@ v_max_u32 v5, src_scc, v2
 v_max_u32 v255, 0xaf123456, v255
 // GFX11: v_max_u32_e32 v255, 0xaf123456, v255    ; encoding: [0xff,0xfe,0xff,0x29,0x56,0x34,0x12,0xaf]
 
-v_min_f16 v5, v1, v2
-// GFX11: v_min_f16_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x74]
+v_min_f16 v5.l, v1.l, v2.l
+// GFX11: v_min_f16_e32 v5.l, v1.l, v2.l          ; encoding: [0x01,0x05,0x0a,0x74]
+
+v_min_f16 v5.l, v127.l, v2.l
+// GFX11: v_min_f16_e32 v5.l, v127.l, v2.l        ; encoding: [0x7f,0x05,0x0a,0x74]
+
+v_min_f16 v5.l, s1, v2.l
+// GFX11: v_min_f16_e32 v5.l, s1, v2.l            ; encoding: [0x01,0x04,0x0a,0x74]
+
+v_min_f16 v5.l, s105, v2.l
+// GFX11: v_min_f16_e32 v5.l, s105, v2.l          ; encoding: [0x69,0x04,0x0a,0x74]
+
+v_min_f16 v5.l, vcc_lo, v2.l
+// GFX11: v_min_f16_e32 v5.l, vcc_lo, v2.l        ; encoding: [0x6a,0x04,0x0a,0x74]
+
+v_min_f16 v5.l, vcc_hi, v2.l
+// GFX11: v_min_f16_e32 v5.l, vcc_hi, v2.l        ; encoding: [0x6b,0x04,0x0a,0x74]
 
-v_min_f16 v5, v127, v2
-// GFX11: v_min_f16_e32 v5, v127, v2              ; encoding: [0x7f,0x05,0x0a,0x74]
+v_min_f16 v5.l, ttmp15, v2.l
+// GFX11: v_min_f16_e32 v5.l, ttmp15, v2.l        ; encoding: [0x7b,0x04,0x0a,0x74]
 
-v_min_f16 v5, s1, v2
-// GFX11: v_min_f16_e32 v5, s1, v2                ; encoding: [0x01,0x04,0x0a,0x74]
+v_min_f16 v5.l, m0, v2.l
+// GFX11: v_min_f16_e32 v5.l, m0, v2.l            ; encoding: [0x7d,0x04,0x0a,0x74]
 
-v_min_f16 v5, s105, v2
-// GFX11: v_min_f16_e32 v5, s105, v2              ; encoding: [0x69,0x04,0x0a,0x74]
+v_min_f16 v5.l, exec_lo, v2.l
+// GFX11: v_min_f16_e32 v5.l, exec_lo, v2.l       ; encoding: [0x7e,0x04,0x0a,0x74]
 
-v_min_f16 v5, vcc_lo, v2
-// GFX11: v_min_f16_e32 v5, vcc_lo, v2            ; encoding: [0x6a,0x04,0x0a,0x74]
+v_min_f16 v5.l, exec_hi, v2.l
+// GFX11: v_min_f16_e32 v5.l, exec_hi, v2.l       ; encoding: [0x7f,0x04,0x0a,0x74]
 
-v_min_f16 v5, vcc_hi, v2
-// GFX11: v_min_f16_e32 v5, vcc_hi, v2            ; encoding: [0x6b,0x04,0x0a,0x74]
+v_min_f16 v5.l, null, v2.l
+// GFX11: v_min_f16_e32 v5.l, null, v2.l          ; encoding: [0x7c,0x04,0x0a,0x74]
 
-v_min_f16 v5, ttmp15, v2
-// GFX11: v_min_f16_e32 v5, ttmp15, v2            ; encoding: [0x7b,0x04,0x0a,0x74]
+v_min_f16 v5.l, -1, v2.l
+// GFX11: v_min_f16_e32 v5.l, -1, v2.l            ; encoding: [0xc1,0x04,0x0a,0x74]
 
-v_min_f16 v5, m0, v2
-// GFX11: v_min_f16_e32 v5, m0, v2                ; encoding: [0x7d,0x04,0x0a,0x74]
+v_min_f16 v5.l, 0.5, v2.l
+// GFX11: v_min_f16_e32 v5.l, 0.5, v2.l           ; encoding: [0xf0,0x04,0x0a,0x74]
 
-v_min_f16 v5, exec_lo, v2
-// GFX11: v_min_f16_e32 v5, exec_lo, v2           ; encoding: [0x7e,0x04,0x0a,0x74]
+v_min_f16 v5.l, src_scc, v2.l
+// GFX11: v_min_f16_e32 v5.l, src_scc, v2.l       ; encoding: [0xfd,0x04,0x0a,0x74]
 
-v_min_f16 v5, exec_hi, v2
-// GFX11: v_min_f16_e32 v5, exec_hi, v2           ; encoding: [0x7f,0x04,0x0a,0x74]
+v_min_f16 v127.l, 0xfe0b, v127.l
+// GFX11: v_min_f16_e32 v127.l, 0xfe0b, v127.l    ; encoding: [0xff,0xfe,0xfe,0x74,0x0b,0xfe,0x00,0x00]
 
-v_min_f16 v5, null, v2
-// GFX11: v_min_f16_e32 v5, null, v2              ; encoding: [0x7c,0x04,0x0a,0x74]
+v_min_f16 v5.l, v1.h, v2.l
+// GFX11: v_min_f16_e32 v5.l, v1.h, v2.l          ; encoding: [0x81,0x05,0x0a,0x74]
 
-v_min_f16 v5, -1, v2
-// GFX11: v_min_f16_e32 v5, -1, v2                ; encoding: [0xc1,0x04,0x0a,0x74]
+v_min_f16 v5.l, v127.h, v2.l
+// GFX11: v_min_f16_e32 v5.l, v127.h, v2.l        ; encoding: [0xff,0x05,0x0a,0x74]
 
-v_min_f16 v5, 0.5, v2
-// GFX11: v_min_f16_e32 v5, 0.5, v2               ; encoding: [0xf0,0x04,0x0a,0x74]
+v_min_f16 v127.l, 0.5, v127.l
+// GFX11: v_min_f16_e32 v127.l, 0.5, v127.l       ; encoding: [0xf0,0xfe,0xfe,0x74]
 
-v_min_f16 v5, src_scc, v2
-// GFX11: v_min_f16_e32 v5, src_scc, v2           ; encoding: [0xfd,0x04,0x0a,0x74]
+v_min_f16 v5.h, src_scc, v2.h
+// GFX11: v_min_f16_e32 v5.h, src_scc, v2.h       ; encoding: [0xfd,0x04,0x0b,0x75]
 
-v_min_f16 v127, 0xfe0b, v127
-// GFX11: v_min_f16_e32 v127, 0xfe0b, v127        ; encoding: [0xff,0xfe,0xfe,0x74,0x0b,0xfe,0x00,0x00]
+v_min_f16 v127.h, 0xfe0b, v127.h
+// GFX11: v_min_f16_e32 v127.h, 0xfe0b, v127.h    ; encoding: [0xff,0xfe,0xff,0x75,0x0b,0xfe,0x00,0x00]
 
 v_min_f32 v5, v1, v2
 // GFX11: v_min_f32_e32 v5, v1, v2                ; encoding: [0x01,0x05,0x0a,0x1e]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
index 00353c4cdcb496..151784b1646aed 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop2_dpp16.s
@@ -849,47 +849,56 @@ v_lshrrev_b32 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:
 v_lshrrev_b32 v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_lshrrev_b32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x33,0xff,0x6f,0x05,0x30]
 
-v_max_f16 v5, v1, v2 quad_perm:[3,2,1,0]
-// GFX11: v_max_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff]
+v_max_f16 v5.l, v1.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff]
 
-v_max_f16 v5, v1, v2 quad_perm:[0,1,2,3]
-// GFX11: v_max_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff]
+v_max_f16 v5.l, v1.l, v2.l quad_perm:[0,1,2,3]
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff]
 
-v_max_f16 v5, v1, v2 row_mirror
-// GFX11: v_max_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_mirror
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_half_mirror
-// GFX11: v_max_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_half_mirror
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shl:1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shl:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shl:15
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shl:15
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shr:1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shr:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_shr:15
-// GFX11: v_max_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_shr:15
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_ror:1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_ror:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_ror:15
-// GFX11: v_max_f16_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_ror:15
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf
-// GFX11: v_max_f16_dpp v5, v1, v2 row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff]
+v_max_f16 v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff]
 
-v_max_f16 v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1
-// GFX11: v_max_f16_dpp v5, v1, v2 row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01]
+v_max_f16 v5.l, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01]
 
-v_max_f16 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
-// GFX11: v_max_f16_dpp v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x60,0x09,0x13]
+v_max_f16 v5.l, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1
+// GFX11: v_max_f16_dpp v5.l, v1.l, v2.l row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0a,0x72,0x01,0x60,0x09,0x13]
 
-v_max_f16 v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
-// GFX11: v_max_f16_dpp v127, -|v127|, -|v127| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xf5,0x30]
+v_max_f16 v127.l, -|v127.l|, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1
+// GFX11: v_max_f16_dpp v127.l, -|v127.l|, -|v127.l| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xf5,0x30]
+
+v_max_f16 v127.l, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1
+// GFX11: v_max_f16_dpp v127.l, v127.l, v127.l row_share:15 row_mask:0x0 bank_mask:0x1 ; encoding: [0xfa,0xfe,0xfe,0x72,0x7f,0x5f,0x01,0x01]
+
+v_max_f16 v5.h, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
+// GFX11: v_max_f16_dpp v5.h, v1.h, v2.h row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 ; encoding: [0xfa,0x04,0x0b,0x73,0x81,0x60,0x09,0x13]
+
+v_max_f16 v127.h, -|v127.h|, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
+// GFX11: v_max_f16_dpp v127.h, -|v127.h|, -|v127.h| row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x73,0xff,0x6f,0xf5,0x30]
 
 v_max_f32 v5, v1, v2 quad_perm:[3,2,1,0]
 // GFX11: v_max_f32_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0xff]
@@ -1017,47 +1026,56 @@ v_max_u32 v5, v1, v2 row_xmask:0 row_mask:0x1 bank_mask:0x3 bound_ctrl:1 fi:0
 v_max_u32 v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
 // GFX11: v_max_u32_dpp v255, v255, v255 row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xfa,0xfe,0xff,0x29,0xff,0x6f,0x05,0x30]
 
-v_min_f16 v5, v1, v2 quad_perm:[3,2,1,0]
-// GFX11: v_min_f16_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff]
+v_min_f16 v5.l, v1.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff]
+
+v_min_f16 v5.l, v1.l, v2.l quad_perm:[0,1,2,3]
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff]
+
+v_min_f16 v5.l, v1.l, v2.l row_mirror
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff]
+
+v_min_f16 v5.l, v1.l, v2.l row_half_mirror
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff]
 
-v_min_f16 v5, v1, v2 quad_perm:[0,1,2,3]
-// GFX11: v_min_f16_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shl:1
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_mirror
-// GFX11: v_min_f16_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shl:15
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_half_mirror
-// GFX11: v_min_f16_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shr:1
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shl:1
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_shr:15
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shl:15
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_ror:1
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shr:1
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_ror:15
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0xff]
 
-v_min_f16 v5, v1, v2 row_shr:15
-// GFX11: v_min_f16_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff]
+v_min_f16 v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf
+// GFX11: v_min_f16_dpp v5.l, v1.l, v2.l row_share:0 row_mask:0xf bank_mask:0xf ; encoding: [0xfa,0x04,0x0a,0x74,0x01,0x50,0x01,0xff]
 
-v_min_f16...
[truncated]

@broxigarchen broxigarchen merged commit 8bbbcad into llvm:main Dec 17, 2024
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@arsenm arsenm arsenm approved these changes

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@broxigarchen @llvmbot @arsenm