[AMDGPU][True16][MC] test update for v_and/or/xor_b16 in true16 #119489
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@llvm/pr-subscribers-mc @llvm/pr-subscribers-backend-amdgpu Author: Brox Chen (broxigarchen) ChangesThis is a NFC change. Update mc test for v_and/or/xor_b16 in true16 format. MC source change was done by previous patch and automatically enabled by t16 pesudo Patch is 144.31 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/119489.diff 13 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/VOP3Instructions.td b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
index 8a9f8aa3d16d3a..eb816f8f0b8531 100644
--- a/llvm/lib/Target/AMDGPU/VOP3Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP3Instructions.td
@@ -1775,12 +1775,9 @@ defm V_READLANE_B32 : VOP3_Real_No_Suffix_gfx11_gfx12<0x360>; // Pseudo i
let InOperandList = (ins SSrcOrLds_b32:$src0, SCSrc_b32:$src1, VGPR_32:$vdst_in) in {
defm V_WRITELANE_B32 : VOP3_Real_No_Suffix_gfx11_gfx12<0x361>; // Pseudo in VOP2
} // End InOperandList = (ins SSrcOrLds_b32:$src0, SCSrc_b32:$src1, VGPR_32:$vdst_in)
-defm V_AND_B16_t16 : VOP3Only_Realtriple_t16_gfx11_gfx12<0x362, "v_and_b16">;
-defm V_AND_B16_fake16 : VOP3Only_Realtriple_t16_gfx11_gfx12<0x362, "v_and_b16">;
-defm V_OR_B16_t16 : VOP3Only_Realtriple_t16_gfx11_gfx12<0x363, "v_or_b16">;
-defm V_OR_B16_fake16 : VOP3Only_Realtriple_t16_gfx11_gfx12<0x363, "v_or_b16">;
-defm V_XOR_B16_t16 : VOP3Only_Realtriple_t16_gfx11_gfx12<0x364, "v_xor_b16">;
-defm V_XOR_B16_fake16 : VOP3Only_Realtriple_t16_gfx11_gfx12<0x364, "v_xor_b16">;
+defm V_AND_B16 : VOP3Only_Realtriple_t16_and_fake16_gfx11_gfx12<0x362, "v_and_b16">;
+defm V_OR_B16 : VOP3Only_Realtriple_t16_and_fake16_gfx11_gfx12<0x363, "v_or_b16">;
+defm V_XOR_B16 : VOP3Only_Realtriple_t16_and_fake16_gfx11_gfx12<0x364, "v_xor_b16">;
let AssemblerPredicate = isGFX11Plus in {
def : AMDGPUMnemonicAlias<"v_add3_nc_u32", "v_add3_u32">;
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
index b649bab532f262..cc75dda1101770 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3.s
@@ -494,50 +494,59 @@ v_alignbyte_b32 v5, src_scc, vcc_lo, -1
v_alignbyte_b32 v255, 0xaf123456, vcc_hi, null
// GFX11: v_alignbyte_b32 v255, 0xaf123456, vcc_hi, null ; encoding: [0xff,0x00,0x17,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
-v_and_b16 v5, v1, v2
-// GFX11: v_and_b16 v5, v1, v2 ; encoding: [0x05,0x00,0x62,0xd7,0x01,0x05,0x02,0x00]
+v_and_b16 v5.l, v1.l, v2.l
+// GFX11: v_and_b16 v5.l, v1.l, v2.l ; encoding: [0x05,0x00,0x62,0xd7,0x01,0x05,0x02,0x00]
-v_and_b16 v5, v255, v255
-// GFX11: v_and_b16 v5, v255, v255 ; encoding: [0x05,0x00,0x62,0xd7,0xff,0xff,0x03,0x00]
+v_and_b16 v5.l, v255.l, v255.l
+// GFX11: v_and_b16 v5.l, v255.l, v255.l ; encoding: [0x05,0x00,0x62,0xd7,0xff,0xff,0x03,0x00]
-v_and_b16 v5, s1, s2
-// GFX11: v_and_b16 v5, s1, s2 ; encoding: [0x05,0x00,0x62,0xd7,0x01,0x04,0x00,0x00]
+v_and_b16 v5.l, s1, s2
+// GFX11: v_and_b16 v5.l, s1, s2 ; encoding: [0x05,0x00,0x62,0xd7,0x01,0x04,0x00,0x00]
-v_and_b16 v5, s105, s105
-// GFX11: v_and_b16 v5, s105, s105 ; encoding: [0x05,0x00,0x62,0xd7,0x69,0xd2,0x00,0x00]
+v_and_b16 v5.l, s105, s105
+// GFX11: v_and_b16 v5.l, s105, s105 ; encoding: [0x05,0x00,0x62,0xd7,0x69,0xd2,0x00,0x00]
-v_and_b16 v5, vcc_lo, ttmp15
-// GFX11: v_and_b16 v5, vcc_lo, ttmp15 ; encoding: [0x05,0x00,0x62,0xd7,0x6a,0xf6,0x00,0x00]
+v_and_b16 v5.l, vcc_lo, ttmp15
+// GFX11: v_and_b16 v5.l, vcc_lo, ttmp15 ; encoding: [0x05,0x00,0x62,0xd7,0x6a,0xf6,0x00,0x00]
-v_and_b16 v5, vcc_hi, 0xfe0b
-// GFX11: v_and_b16 v5, vcc_hi, 0xfe0b ; encoding: [0x05,0x00,0x62,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+v_and_b16 v5.l, vcc_hi, 0xfe0b
+// GFX11: v_and_b16 v5.l, vcc_hi, 0xfe0b ; encoding: [0x05,0x00,0x62,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
-v_and_b16 v5, ttmp15, src_scc
-// GFX11: v_and_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x00,0x62,0xd7,0x7b,0xfa,0x01,0x00]
+v_and_b16 v5.l, ttmp15, src_scc
+// GFX11: v_and_b16 v5.l, ttmp15, src_scc ; encoding: [0x05,0x00,0x62,0xd7,0x7b,0xfa,0x01,0x00]
-v_and_b16 v5, m0, 0.5
-// GFX11: v_and_b16 v5, m0, 0.5 ; encoding: [0x05,0x00,0x62,0xd7,0x7d,0xe0,0x01,0x00]
+v_and_b16 v5.l, m0, 0.5
+// GFX11: v_and_b16 v5.l, m0, 0.5 ; encoding: [0x05,0x00,0x62,0xd7,0x7d,0xe0,0x01,0x00]
-v_and_b16 v5, exec_lo, -1
-// GFX11: v_and_b16 v5, exec_lo, -1 ; encoding: [0x05,0x00,0x62,0xd7,0x7e,0x82,0x01,0x00]
+v_and_b16 v5.l, exec_lo, -1
+// GFX11: v_and_b16 v5.l, exec_lo, -1 ; encoding: [0x05,0x00,0x62,0xd7,0x7e,0x82,0x01,0x00]
-v_and_b16 v5, exec_hi, null
-// GFX11: v_and_b16 v5, exec_hi, null ; encoding: [0x05,0x00,0x62,0xd7,0x7f,0xf8,0x00,0x00]
+v_and_b16 v5.l, exec_hi, null
+// GFX11: v_and_b16 v5.l, exec_hi, null ; encoding: [0x05,0x00,0x62,0xd7,0x7f,0xf8,0x00,0x00]
-v_and_b16 v5, null, exec_lo
-// GFX11: v_and_b16 v5, null, exec_lo ; encoding: [0x05,0x00,0x62,0xd7,0x7c,0xfc,0x00,0x00]
+v_and_b16 v5.l, null, exec_lo
+// GFX11: v_and_b16 v5.l, null, exec_lo ; encoding: [0x05,0x00,0x62,0xd7,0x7c,0xfc,0x00,0x00]
-v_and_b16 v5, -1, exec_hi
-// GFX11: v_and_b16 v5, -1, exec_hi ; encoding: [0x05,0x00,0x62,0xd7,0xc1,0xfe,0x00,0x00]
+v_and_b16 v5.l, -1, exec_hi
+// GFX11: v_and_b16 v5.l, -1, exec_hi ; encoding: [0x05,0x00,0x62,0xd7,0xc1,0xfe,0x00,0x00]
-v_and_b16 v5, 0.5, m0
-// GFX11: v_and_b16 v5, 0.5, m0 ; encoding: [0x05,0x00,0x62,0xd7,0xf0,0xfa,0x00,0x00]
+v_and_b16 v5.l, 0.5, m0
+// GFX11: v_and_b16 v5.l, 0.5, m0 ; encoding: [0x05,0x00,0x62,0xd7,0xf0,0xfa,0x00,0x00]
-v_and_b16 v5, src_scc, vcc_lo
-// GFX11: v_and_b16 v5, src_scc, vcc_lo ; encoding: [0x05,0x00,0x62,0xd7,0xfd,0xd4,0x00,0x00]
+v_and_b16 v5.l, src_scc, vcc_lo
+// GFX11: v_and_b16 v5.l, src_scc, vcc_lo ; encoding: [0x05,0x00,0x62,0xd7,0xfd,0xd4,0x00,0x00]
-v_and_b16 v255, 0xfe0b, vcc_hi
-// GFX11: v_and_b16 v255, 0xfe0b, vcc_hi ; encoding: [0xff,0x00,0x62,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+v_and_b16 v255.l, 0xfe0b, vcc_hi
+// GFX11: v_and_b16 v255.l, 0xfe0b, vcc_hi ; encoding: [0xff,0x00,0x62,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+
+v_and_b16 v5.l, v1.h, v2.l
+// GFX11: [0x05,0x08,0x62,0xd7,0x01,0x05,0x02,0x00]
+
+v_and_b16 v5.l, v255.l, v255.h
+// GFX11: [0x05,0x10,0x62,0xd7,0xff,0xff,0x03,0x00]
+
+v_and_b16 v255.h, 0xfe0b, vcc_hi
+// GFX11: [0xff,0x40,0x62,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
v_and_or_b32 v5, v1, v2, s3
// GFX11: v_and_or_b32 v5, v1, v2, s3 ; encoding: [0x05,0x00,0x57,0xd6,0x01,0x05,0x0e,0x00]
@@ -5162,50 +5171,59 @@ v_or3_b32 v5, src_scc, vcc_lo, -1
v_or3_b32 v255, 0xaf123456, vcc_hi, null
// GFX11: v_or3_b32 v255, 0xaf123456, vcc_hi, null ; encoding: [0xff,0x00,0x58,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
-v_or_b16 v5, v1, v2
-// GFX11: v_or_b16 v5, v1, v2 ; encoding: [0x05,0x00,0x63,0xd7,0x01,0x05,0x02,0x00]
+v_or_b16 v5.l, v1.l, v2.l
+// GFX11: v_or_b16 v5.l, v1.l, v2.l ; encoding: [0x05,0x00,0x63,0xd7,0x01,0x05,0x02,0x00]
+
+v_or_b16 v5.l, v255.l, v255.l
+// GFX11: v_or_b16 v5.l, v255.l, v255.l ; encoding: [0x05,0x00,0x63,0xd7,0xff,0xff,0x03,0x00]
+
+v_or_b16 v5.l, s1, s2
+// GFX11: v_or_b16 v5.l, s1, s2 ; encoding: [0x05,0x00,0x63,0xd7,0x01,0x04,0x00,0x00]
-v_or_b16 v5, v255, v255
-// GFX11: v_or_b16 v5, v255, v255 ; encoding: [0x05,0x00,0x63,0xd7,0xff,0xff,0x03,0x00]
+v_or_b16 v5.l, s105, s105
+// GFX11: v_or_b16 v5.l, s105, s105 ; encoding: [0x05,0x00,0x63,0xd7,0x69,0xd2,0x00,0x00]
-v_or_b16 v5, s1, s2
-// GFX11: v_or_b16 v5, s1, s2 ; encoding: [0x05,0x00,0x63,0xd7,0x01,0x04,0x00,0x00]
+v_or_b16 v5.l, vcc_lo, ttmp15
+// GFX11: v_or_b16 v5.l, vcc_lo, ttmp15 ; encoding: [0x05,0x00,0x63,0xd7,0x6a,0xf6,0x00,0x00]
-v_or_b16 v5, s105, s105
-// GFX11: v_or_b16 v5, s105, s105 ; encoding: [0x05,0x00,0x63,0xd7,0x69,0xd2,0x00,0x00]
+v_or_b16 v5.l, vcc_hi, 0xfe0b
+// GFX11: v_or_b16 v5.l, vcc_hi, 0xfe0b ; encoding: [0x05,0x00,0x63,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
-v_or_b16 v5, vcc_lo, ttmp15
-// GFX11: v_or_b16 v5, vcc_lo, ttmp15 ; encoding: [0x05,0x00,0x63,0xd7,0x6a,0xf6,0x00,0x00]
+v_or_b16 v5.l, ttmp15, src_scc
+// GFX11: v_or_b16 v5.l, ttmp15, src_scc ; encoding: [0x05,0x00,0x63,0xd7,0x7b,0xfa,0x01,0x00]
-v_or_b16 v5, vcc_hi, 0xfe0b
-// GFX11: v_or_b16 v5, vcc_hi, 0xfe0b ; encoding: [0x05,0x00,0x63,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+v_or_b16 v5.l, m0, 0.5
+// GFX11: v_or_b16 v5.l, m0, 0.5 ; encoding: [0x05,0x00,0x63,0xd7,0x7d,0xe0,0x01,0x00]
-v_or_b16 v5, ttmp15, src_scc
-// GFX11: v_or_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x00,0x63,0xd7,0x7b,0xfa,0x01,0x00]
+v_or_b16 v5.l, exec_lo, -1
+// GFX11: v_or_b16 v5.l, exec_lo, -1 ; encoding: [0x05,0x00,0x63,0xd7,0x7e,0x82,0x01,0x00]
-v_or_b16 v5, m0, 0.5
-// GFX11: v_or_b16 v5, m0, 0.5 ; encoding: [0x05,0x00,0x63,0xd7,0x7d,0xe0,0x01,0x00]
+v_or_b16 v5.l, exec_hi, null
+// GFX11: v_or_b16 v5.l, exec_hi, null ; encoding: [0x05,0x00,0x63,0xd7,0x7f,0xf8,0x00,0x00]
-v_or_b16 v5, exec_lo, -1
-// GFX11: v_or_b16 v5, exec_lo, -1 ; encoding: [0x05,0x00,0x63,0xd7,0x7e,0x82,0x01,0x00]
+v_or_b16 v5.l, null, exec_lo
+// GFX11: v_or_b16 v5.l, null, exec_lo ; encoding: [0x05,0x00,0x63,0xd7,0x7c,0xfc,0x00,0x00]
-v_or_b16 v5, exec_hi, null
-// GFX11: v_or_b16 v5, exec_hi, null ; encoding: [0x05,0x00,0x63,0xd7,0x7f,0xf8,0x00,0x00]
+v_or_b16 v5.l, -1, exec_hi
+// GFX11: v_or_b16 v5.l, -1, exec_hi ; encoding: [0x05,0x00,0x63,0xd7,0xc1,0xfe,0x00,0x00]
-v_or_b16 v5, null, exec_lo
-// GFX11: v_or_b16 v5, null, exec_lo ; encoding: [0x05,0x00,0x63,0xd7,0x7c,0xfc,0x00,0x00]
+v_or_b16 v5.l, 0.5, m0
+// GFX11: v_or_b16 v5.l, 0.5, m0 ; encoding: [0x05,0x00,0x63,0xd7,0xf0,0xfa,0x00,0x00]
-v_or_b16 v5, -1, exec_hi
-// GFX11: v_or_b16 v5, -1, exec_hi ; encoding: [0x05,0x00,0x63,0xd7,0xc1,0xfe,0x00,0x00]
+v_or_b16 v5.l, src_scc, vcc_lo
+// GFX11: v_or_b16 v5.l, src_scc, vcc_lo ; encoding: [0x05,0x00,0x63,0xd7,0xfd,0xd4,0x00,0x00]
-v_or_b16 v5, 0.5, m0
-// GFX11: v_or_b16 v5, 0.5, m0 ; encoding: [0x05,0x00,0x63,0xd7,0xf0,0xfa,0x00,0x00]
+v_or_b16 v255.l, 0xfe0b, vcc_hi
+// GFX11: v_or_b16 v255.l, 0xfe0b, vcc_hi ; encoding: [0xff,0x00,0x63,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
-v_or_b16 v5, src_scc, vcc_lo
-// GFX11: v_or_b16 v5, src_scc, vcc_lo ; encoding: [0x05,0x00,0x63,0xd7,0xfd,0xd4,0x00,0x00]
+v_or_b16 v5.l, v1.h, v2.l
+// GFX11: [0x05,0x08,0x63,0xd7,0x01,0x05,0x02,0x00]
-v_or_b16 v255, 0xfe0b, vcc_hi
-// GFX11: v_or_b16 v255, 0xfe0b, vcc_hi ; encoding: [0xff,0x00,0x63,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+v_or_b16 v5.l, v255.l, v255.h
+// GFX11: [0x05,0x10,0x63,0xd7,0xff,0xff,0x03,0x00]
+
+v_or_b16 v255.h, 0xfe0b, vcc_hi
+// GFX11: [0xff,0x40,0x63,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
v_pack_b32_f16 v5, v1, v2
// GFX11: v_pack_b32_f16 v5, v1, v2 ; encoding: [0x05,0x00,0x11,0xd7,0x01,0x05,0x02,0x00]
@@ -6196,47 +6214,56 @@ v_xor3_b32 v5, src_scc, vcc_lo, -1
v_xor3_b32 v255, 0xaf123456, vcc_hi, null
// GFX11: v_xor3_b32 v255, 0xaf123456, vcc_hi, null ; encoding: [0xff,0x00,0x40,0xd6,0xff,0xd6,0xf0,0x01,0x56,0x34,0x12,0xaf]
-v_xor_b16 v5, v1, v2
-// GFX11: v_xor_b16 v5, v1, v2 ; encoding: [0x05,0x00,0x64,0xd7,0x01,0x05,0x02,0x00]
+v_xor_b16 v5.l, v1.l, v2.l
+// GFX11: v_xor_b16 v5.l, v1.l, v2.l ; encoding: [0x05,0x00,0x64,0xd7,0x01,0x05,0x02,0x00]
+
+v_xor_b16 v5.l, v255.l, v255.l
+// GFX11: v_xor_b16 v5.l, v255.l, v255.l ; encoding: [0x05,0x00,0x64,0xd7,0xff,0xff,0x03,0x00]
+
+v_xor_b16 v5.l, s1, s2
+// GFX11: v_xor_b16 v5.l, s1, s2 ; encoding: [0x05,0x00,0x64,0xd7,0x01,0x04,0x00,0x00]
+
+v_xor_b16 v5.l, s105, s105
+// GFX11: v_xor_b16 v5.l, s105, s105 ; encoding: [0x05,0x00,0x64,0xd7,0x69,0xd2,0x00,0x00]
-v_xor_b16 v5, v255, v255
-// GFX11: v_xor_b16 v5, v255, v255 ; encoding: [0x05,0x00,0x64,0xd7,0xff,0xff,0x03,0x00]
+v_xor_b16 v5.l, vcc_lo, ttmp15
+// GFX11: v_xor_b16 v5.l, vcc_lo, ttmp15 ; encoding: [0x05,0x00,0x64,0xd7,0x6a,0xf6,0x00,0x00]
-v_xor_b16 v5, s1, s2
-// GFX11: v_xor_b16 v5, s1, s2 ; encoding: [0x05,0x00,0x64,0xd7,0x01,0x04,0x00,0x00]
+v_xor_b16 v5.l, vcc_hi, 0xfe0b
+// GFX11: v_xor_b16 v5.l, vcc_hi, 0xfe0b ; encoding: [0x05,0x00,0x64,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
-v_xor_b16 v5, s105, s105
-// GFX11: v_xor_b16 v5, s105, s105 ; encoding: [0x05,0x00,0x64,0xd7,0x69,0xd2,0x00,0x00]
+v_xor_b16 v5.l, ttmp15, src_scc
+// GFX11: v_xor_b16 v5.l, ttmp15, src_scc ; encoding: [0x05,0x00,0x64,0xd7,0x7b,0xfa,0x01,0x00]
-v_xor_b16 v5, vcc_lo, ttmp15
-// GFX11: v_xor_b16 v5, vcc_lo, ttmp15 ; encoding: [0x05,0x00,0x64,0xd7,0x6a,0xf6,0x00,0x00]
+v_xor_b16 v5.l, m0, 0.5
+// GFX11: v_xor_b16 v5.l, m0, 0.5 ; encoding: [0x05,0x00,0x64,0xd7,0x7d,0xe0,0x01,0x00]
-v_xor_b16 v5, vcc_hi, 0xfe0b
-// GFX11: v_xor_b16 v5, vcc_hi, 0xfe0b ; encoding: [0x05,0x00,0x64,0xd7,0x6b,0xfe,0x01,0x00,0x0b,0xfe,0x00,0x00]
+v_xor_b16 v5.l, exec_lo, -1
+// GFX11: v_xor_b16 v5.l, exec_lo, -1 ; encoding: [0x05,0x00,0x64,0xd7,0x7e,0x82,0x01,0x00]
-v_xor_b16 v5, ttmp15, src_scc
-// GFX11: v_xor_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x00,0x64,0xd7,0x7b,0xfa,0x01,0x00]
+v_xor_b16 v5.l, exec_hi, null
+// GFX11: v_xor_b16 v5.l, exec_hi, null ; encoding: [0x05,0x00,0x64,0xd7,0x7f,0xf8,0x00,0x00]
-v_xor_b16 v5, m0, 0.5
-// GFX11: v_xor_b16 v5, m0, 0.5 ; encoding: [0x05,0x00,0x64,0xd7,0x7d,0xe0,0x01,0x00]
+v_xor_b16 v5.l, null, exec_lo
+// GFX11: v_xor_b16 v5.l, null, exec_lo ; encoding: [0x05,0x00,0x64,0xd7,0x7c,0xfc,0x00,0x00]
-v_xor_b16 v5, exec_lo, -1
-// GFX11: v_xor_b16 v5, exec_lo, -1 ; encoding: [0x05,0x00,0x64,0xd7,0x7e,0x82,0x01,0x00]
+v_xor_b16 v5.l, -1, exec_hi
+// GFX11: v_xor_b16 v5.l, -1, exec_hi ; encoding: [0x05,0x00,0x64,0xd7,0xc1,0xfe,0x00,0x00]
-v_xor_b16 v5, exec_hi, null
-// GFX11: v_xor_b16 v5, exec_hi, null ; encoding: [0x05,0x00,0x64,0xd7,0x7f,0xf8,0x00,0x00]
+v_xor_b16 v5.l, 0.5, m0
+// GFX11: v_xor_b16 v5.l, 0.5, m0 ; encoding: [0x05,0x00,0x64,0xd7,0xf0,0xfa,0x00,0x00]
-v_xor_b16 v5, null, exec_lo
-// GFX11: v_xor_b16 v5, null, exec_lo ; encoding: [0x05,0x00,0x64,0xd7,0x7c,0xfc,0x00,0x00]
+v_xor_b16 v5.l, src_scc, vcc_lo
+// GFX11: v_xor_b16 v5.l, src_scc, vcc_lo ; encoding: [0x05,0x00,0x64,0xd7,0xfd,0xd4,0x00,0x00]
-v_xor_b16 v5, -1, exec_hi
-// GFX11: v_xor_b16 v5, -1, exec_hi ; encoding: [0x05,0x00,0x64,0xd7,0xc1,0xfe,0x00,0x00]
+v_xor_b16 v255.l, 0xfe0b, vcc_hi
+// GFX11: v_xor_b16 v255.l, 0xfe0b, vcc_hi ; encoding: [0xff,0x00,0x64,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
-v_xor_b16 v5, 0.5, m0
-// GFX11: v_xor_b16 v5, 0.5, m0 ; encoding: [0x05,0x00,0x64,0xd7,0xf0,0xfa,0x00,0x00]
+v_xor_b16 v5.l, v1.h, v2.l
+// GFX11: [0x05,0x08,0x64,0xd7,0x01,0x05,0x02,0x00]
-v_xor_b16 v5, src_scc, vcc_lo
-// GFX11: v_xor_b16 v5, src_scc, vcc_lo ; encoding: [0x05,0x00,0x64,0xd7,0xfd,0xd4,0x00,0x00]
+v_xor_b16 v5.l, v255.l, v255.h
+// GFX11: [0x05,0x10,0x64,0xd7,0xff,0xff,0x03,0x00]
-v_xor_b16 v255, 0xfe0b, vcc_hi
-// GFX11: v_xor_b16 v255, 0xfe0b, vcc_hi ; encoding: [0xff,0x00,0x64,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
+v_xor_b16 v255.h, 0xfe0b, vcc_hi
+// GFX11: [0xff,0x40,0x64,0xd7,0xff,0xd6,0x00,0x00,0x0b,0xfe,0x00,0x00]
diff --git a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
index e6f868d2b40e7e..19d1a92b4a2e7f 100644
--- a/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
+++ b/llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s
@@ -405,47 +405,59 @@ v_alignbyte_b32_e64_dpp v5, v1, v2, -1 row_xmask:0 row_mask:0x1 bank_mask:0x3 bo
v_alignbyte_b32_e64_dpp v255, v255, v255, src_scc row_xmask:15 row_mask:0x3 bank_mask:0x0 bound_ctrl:0 fi:1
// GFX11: v_alignbyte_b32_e64_dpp v255, v255, v255, src_scc row_xmask:15 row_mask:0x3 bank_mask:0x0 fi:1 ; encoding: [0xff,0x00,0x17,0xd6,0xfa,0xfe,0xf7,0x03,0xff,0x6f,0x05,0x30]
-v_and_b16_e64_dpp v5, v1, v2 quad_perm:[3,2,1,0]
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0]
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l quad_perm:[3,2,1,0] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x1b,0x00,0xff]
-v_and_b16_e64_dpp v5, v1, v2 quad_perm:[0,1,2,3]
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3]
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0xe4,0x00,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_mirror
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_mirror
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x40,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_half_mirror
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_half_mirror
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_half_mirror row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x41,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_shl:1
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shl:1
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shl:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x01,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_shl:15
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shl:15
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shl:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x0f,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_shr:1
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shr:1
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shr:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x11,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_shr:15
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shr:15
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_shr:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x1f,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_ror:1
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_ror:1
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_ror:1 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x21,0x01,0xff]
-v_and_b16_e64_dpp v5, v1, v2 row_ror:15
-// GFX11: v_and_b16_e64_dpp v5, v1, v2 row_ror:15 row_mask:0xf bank_mask:0xf ; encoding: [0x05,0x00,0x62,0xd7,0xfa,0x04,0x02,0x00,0x01,0x2f,0x01,0xff]
+v_and_b16_e64_dpp v5.l, v1.l, v2.l row_ror:15
+// GFX11: v_and_b16_e64_dpp v5.l, v1.l, v2.l row_ror:15 row_ma...
[truncated]
|
arsenm
approved these changes
Dec 11, 2024
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This is a NFC change. Update mc test for v_and/or/xor_b16 in true16 format.
MC source change was done by previous patch and automatically enabled by t16 pesudo