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[AMDGPU] Assert if stack grows downwards while lowering dynAlloca #119883

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[AMDGPU] Assert if stack grows downwards while lowering dynAlloca #119883

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4 changes: 2 additions & 2 deletions llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1181,8 +1181,8 @@ bool AMDGPURegisterBankInfo::applyMappingDynStackAlloc(

// Guard in case the stack growth direction ever changes with scratch
// instructions.
if (TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsDown)
return false;
assert(TFI.getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
"Stack grows upwards for AMDGPU\n");

Register Dst = MI.getOperand(0).getReg();
Register AllocSize = MI.getOperand(1).getReg();
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8 changes: 3 additions & 5 deletions llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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Expand Up @@ -4041,17 +4041,15 @@ SDValue SITargetLowering::lowerDYNAMIC_STACKALLOCImpl(SDValue Op,
Chain = SP.getValue(1);
MaybeAlign Alignment = cast<ConstantSDNode>(Tmp3)->getMaybeAlignValue();
const TargetFrameLowering *TFL = Subtarget->getFrameLowering();
unsigned Opc =
TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp
? ISD::ADD
: ISD::SUB;
assert(TFL->getStackGrowthDirection() == TargetFrameLowering::StackGrowsUp &&
"Stack grows upwards for AMDGPU\n");

SDValue ScaledSize = DAG.getNode(
ISD::SHL, dl, VT, Size,
DAG.getConstant(Subtarget->getWavefrontSizeLog2(), dl, MVT::i32));

Align StackAlign = TFL->getStackAlign();
Tmp1 = DAG.getNode(Opc, dl, VT, SP, ScaledSize); // Value
Tmp1 = DAG.getNode(ISD::ADD, dl, VT, SP, ScaledSize); // Value
if (Alignment && *Alignment > StackAlign) {
Tmp1 = DAG.getNode(
ISD::AND, dl, VT, Tmp1,
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