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These opcodes are currently in the "strictfp" section. They should either be in "memory", or moved into the generic ocodes.

Note that isTargetMemoryOpcode/FIRST_TARGET_MEMORY_OPCODE doesn't seem to be used for anything at the moment.

…ODE. NFCI

These opcodes are currently in the strictfp section. They should either be in
memory, or moved into the generic ocodes.
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llvmbot commented Dec 16, 2024

@llvm/pr-subscribers-backend-aarch64

Author: David Green (davemgreen)

Changes

These opcodes are currently in the "strictfp" section. They should either be in "memory", or moved into the generic ocodes.

Note that isTargetMemoryOpcode/FIRST_TARGET_MEMORY_OPCODE doesn't seem to be used for anything at the moment.


Full diff: https://github.com/llvm/llvm-project/pull/120091.diff

1 Files Affected:

  • (modified) llvm/lib/Target/AArch64/AArch64ISelLowering.h (+4-4)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index d51b36f7e49946..4ab8e0103fa2cd 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -480,10 +480,6 @@ enum NodeType : unsigned {
   STRICT_FCMP = ISD::FIRST_TARGET_STRICTFP_OPCODE,
   STRICT_FCMPE,
 
-  // SME ZA loads and stores
-  SME_ZA_LDR,
-  SME_ZA_STR,
-
   // NEON Load/Store with post-increment base updates
   LD2post = ISD::FIRST_TARGET_MEMORY_OPCODE,
   LD3post,
@@ -520,6 +516,10 @@ enum NodeType : unsigned {
   STP,
   STILP,
   STNP,
+
+  // SME ZA loads and stores
+  SME_ZA_LDR,
+  SME_ZA_STR,
 };
 
 } // end namespace AArch64ISD

@davemgreen davemgreen merged commit 39c9dda into llvm:main Dec 16, 2024
10 checks passed
@davemgreen davemgreen deleted the gh-a64-movesmezaload branch December 16, 2024 15:46
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3 participants