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16 changes: 16 additions & 0 deletions lld/COFF/Chunks.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -564,6 +564,22 @@ void SectionChunk::getBaserels(std::vector<Baserel> *res) {
continue;
res->emplace_back(rva + rel.VirtualAddress, ty);
}

// Insert a 64-bit relocation for CHPEMetadataPointer in the native load
// config of a hybrid ARM64X image. Its value will be set in prepareLoadConfig
// to match the value in the EC load config, which is expected to be
// a relocatable pointer to the __chpe_metadata symbol.
COFFLinkerContext &ctx = file->symtab.ctx;
if (ctx.hybridSymtab && ctx.symtab.loadConfigSym &&
ctx.symtab.loadConfigSym->getChunk() == this &&
ctx.hybridSymtab->loadConfigSym &&
ctx.symtab.loadConfigSize >=
offsetof(coff_load_configuration64, CHPEMetadataPointer) +
sizeof(coff_load_configuration64::CHPEMetadataPointer))
res->emplace_back(
ctx.symtab.loadConfigSym->getRVA() +
offsetof(coff_load_configuration64, CHPEMetadataPointer),
IMAGE_REL_BASED_DIR64);
}

// MinGW specific.
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6 changes: 5 additions & 1 deletion lld/test/COFF/arm64x-loadconfig.s
Original file line number Diff line number Diff line change
Expand Up @@ -118,10 +118,14 @@
// BASERELOC: BaseReloc [
// BASERELOC-NEXT: Entry {
// BASERELOC-NEXT: Type: DIR64
// BASERELOC-NEXT: Address: 0x10C8
// BASERELOC-NEXT: }
// BASERELOC-NEXT: Entry {
// BASERELOC-NEXT: Type: DIR64
// BASERELOC-NEXT: Address: 0x1208
// BASERELOC-NEXT: }
// BASERELOC-NEXT: Entry {
// BASERELOC: Type: DIR64
// BASERELOC-NEXT: Type: DIR64
// BASERELOC-NEXT: Address: 0x2074
// BASERELOC-NEXT: }

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