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4 changes: 2 additions & 2 deletions llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2823,9 +2823,9 @@ static Instruction *foldSelectWithSRem(SelectInst &SI, InstCombinerImpl &IC,
// %cnd = icmp slt i32 %rem, 0
// %add = add i32 %rem, %n
// %sel = select i1 %cnd, i32 %add, i32 %rem
if (match(TrueVal, m_Add(m_Specific(RemRes), m_Value(Remainder))) &&
if (match(TrueVal, m_c_Add(m_Specific(RemRes), m_Value(Remainder))) &&
match(RemRes, m_SRem(m_Value(Op), m_Specific(Remainder))) &&
IC.isKnownToBeAPowerOfTwo(Remainder, /*OrZero*/ true) &&
IC.isKnownToBeAPowerOfTwo(Remainder, /*OrZero=*/true) &&
FalseVal == RemRes)
return FoldToBitwiseAnd(Remainder);

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15 changes: 15 additions & 0 deletions llvm/test/Transforms/InstCombine/select-divrem.ll
Original file line number Diff line number Diff line change
Expand Up @@ -322,6 +322,21 @@ define i8 @rem_euclid_non_const_pow2(i8 %0, i8 %1) {
ret i8 %sel
}

define i8 @rem_euclid_non_const_pow2_commuted(i8 %0, i8 %1) {
; CHECK-LABEL: @rem_euclid_non_const_pow2_commuted(
; CHECK-NEXT: [[NOTMASK:%.*]] = shl nsw i8 -1, [[TMP0:%.*]]
; CHECK-NEXT: [[TMP3:%.*]] = xor i8 [[NOTMASK]], -1
; CHECK-NEXT: [[SEL:%.*]] = and i8 [[TMP1:%.*]], [[TMP3]]
; CHECK-NEXT: ret i8 [[SEL]]
;
%pow2 = shl i8 1, %0
%rem = srem i8 %1, %pow2
%cond = icmp slt i8 %rem, 0
%add = add i8 %pow2, %rem
%sel = select i1 %cond, i8 %add, i8 %rem
ret i8 %sel
}

define i32 @rem_euclid_pow2_true_arm_folded(i32 %n) {
; CHECK-LABEL: @rem_euclid_pow2_true_arm_folded(
; CHECK-NEXT: [[RES:%.*]] = and i32 [[N:%.*]], 1
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