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[Headers][X86] amxintrin.h - fix attributes according to Intel SDM #122204

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Merged
merged 2 commits into from
Jan 10, 2025
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[Headers][X86] amxintrin.h - fix attributes according to Intel SDM #122204

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c4b07dd
[Headers][X86] amxintrin.h - fix attributes according to SDM
e-kud Jan 9, 2025
2eadd57
Split the amx_api.c to create a regression test
e-kud Jan 10, 2025
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6 changes: 3 additions & 3 deletions clang/lib/Headers/amxintrin.h
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Original file line number Diff line number Diff line change
Expand Up @@ -234,15 +234,15 @@ typedef int _tile1024i_1024a
__attribute__((__vector_size__(1024), __aligned__(1024)));

/// This is internal intrinsic. C/C++ user should avoid calling it directly.
static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE
_tile_loadd_internal(unsigned short m, unsigned short n, const void *base,
__SIZE_TYPE__ stride) {
return __builtin_ia32_tileloadd64_internal(m, n, base,
(__SIZE_TYPE__)(stride));
}

/// This is internal intrinsic. C/C++ user should avoid calling it directly.
static __inline__ _tile1024i __DEFAULT_FN_ATTRS_INT8
static __inline__ _tile1024i __DEFAULT_FN_ATTRS_TILE
_tile_loaddt1_internal(unsigned short m, unsigned short n, const void *base,
__SIZE_TYPE__ stride) {
return __builtin_ia32_tileloaddt164_internal(m, n, base,
Expand Down Expand Up @@ -278,7 +278,7 @@ _tile_dpbuud_internal(unsigned short m, unsigned short n, unsigned short k,
}

/// This is internal intrinsic. C/C++ user should avoid calling it directly.
static __inline__ void __DEFAULT_FN_ATTRS_INT8
static __inline__ void __DEFAULT_FN_ATTRS_TILE
_tile_stored_internal(unsigned short m, unsigned short n, void *base,
__SIZE_TYPE__ stride, _tile1024i tile) {
return __builtin_ia32_tilestored64_internal(m, n, base,
Expand Down
30 changes: 0 additions & 30 deletions clang/test/CodeGen/X86/amx_api.c
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Expand Up @@ -33,22 +33,6 @@ void test_api(int cond, short row, short col) {
__tile_stored(buf, STRIDE, c);
}

void test_tile_loadd(short row, short col) {
//CHECK-LABEL: @test_tile_loadd
//CHECK-DAG: call x86_amx @llvm.x86.tileloadd64.internal
//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
__tile1024i a = {row, col};
__tile_loadd(&a, buf, STRIDE);
}

void test_tile_stream_loadd(short row, short col) {
//CHECK-LABEL: @test_tile_stream_loadd
//CHECK-DAG: call x86_amx @llvm.x86.tileloaddt164.internal
//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
__tile1024i a = {row, col};
__tile_stream_loadd(&a, buf, STRIDE);
}

void test_tile_dpbssd(__tile1024i a, __tile1024i b, __tile1024i c) {
//CHECK-LABEL: @test_tile_dpbssd
//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
Expand Down Expand Up @@ -81,20 +65,6 @@ void test_tile_dpbuud(__tile1024i a, __tile1024i b, __tile1024i c) {
__tile_dpbuud(&c, a, b);
}

void test_tile_stored(__tile1024i c) {
//CHECK-LABEL: @test_tile_stored
//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
//CHECK-DAG: call void @llvm.x86.tilestored64.internal
__tile_stored(buf, STRIDE, c);
}

void test_tile_zero(__tile1024i c) {
//CHECK-LABEL: @test_tile_zero
//CHECK-DAG: call x86_amx @llvm.x86.tilezero.internal
//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
__tile_zero(&c);
}

void test_tile_dpbf16ps(__tile1024i a, __tile1024i b, __tile1024i c) {
//CHECK-LABEL: @test_tile_dpbf16ps
//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
Expand Down
37 changes: 37 additions & 0 deletions clang/test/CodeGen/X86/amx_tile.c
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@@ -0,0 +1,37 @@
// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding -triple=x86_64-unknown-unknown -target-feature +amx-tile \
// RUN: -emit-llvm -o - -Werror -pedantic | FileCheck %s --check-prefixes=CHECK

#include <immintrin.h>

char buf[1024];
#define STRIDE 32

void test_tile_loadd(short row, short col) {
//CHECK-LABEL: @test_tile_loadd
//CHECK-DAG: call x86_amx @llvm.x86.tileloadd64.internal
//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
__tile1024i a = {row, col};
__tile_loadd(&a, buf, STRIDE);
}

void test_tile_stream_loadd(short row, short col) {
//CHECK-LABEL: @test_tile_stream_loadd
//CHECK-DAG: call x86_amx @llvm.x86.tileloaddt164.internal
//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
__tile1024i a = {row, col};
__tile_stream_loadd(&a, buf, STRIDE);
}

void test_tile_stored(__tile1024i c) {
//CHECK-LABEL: @test_tile_stored
//CHECK-DAG: call x86_amx @llvm.x86.cast.vector.to.tile.v256i32(<256 x i32> {{%.*}})
//CHECK-DAG: call void @llvm.x86.tilestored64.internal
__tile_stored(buf, STRIDE, c);
}

void test_tile_zero(__tile1024i c) {
//CHECK-LABEL: @test_tile_zero
//CHECK-DAG: call x86_amx @llvm.x86.tilezero.internal
//CHECK-DAG: call <256 x i32> @llvm.x86.cast.tile.to.vector.v256i32(x86_amx {{%.*}})
__tile_zero(&c);
}
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