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[MLIR][Vector] Allow any strided memref for one-element vector.load in lowering vector.gather #122437

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Merged
merged 4 commits into from
Jan 12, 2025
Merged

[MLIR][Vector] Allow any strided memref for one-element vector.load in lowering vector.gather #122437

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[MLIR][Vector] Allow strided memref for one-element vector.load in lo…
PragmaTwice Jan 10, 2025
1933fba
add test case
PragmaTwice Jan 10, 2025
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Apply suggestions from code review
PragmaTwice Jan 10, 2025
6a76046
fix test case and add a negative case
PragmaTwice Jan 10, 2025
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4 changes: 3 additions & 1 deletion mlir/lib/Dialect/Vector/Transforms/LowerVectorGather.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -206,10 +206,12 @@ struct Gather1DToConditionalLoads : OpRewritePattern<vector::GatherOp> {
Value base = op.getBase();

// vector.load requires the most minor memref dim to have unit stride
// (unless reading exactly 1 element)
if (auto memType = dyn_cast<MemRefType>(base.getType())) {
if (auto stridesAttr =
dyn_cast_if_present<StridedLayoutAttr>(memType.getLayout())) {
if (stridesAttr.getStrides().back() != 1)
if (stridesAttr.getStrides().back() != 1 &&
resultTy.getNumElements() != 1)
return failure();
}
}
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28 changes: 28 additions & 0 deletions mlir/test/Dialect/Vector/vector-gather-lowering.mlir
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Expand Up @@ -136,6 +136,34 @@ func.func @gather_tensor_1d(%base: tensor<?xf32>, %v: vector<2xindex>, %mask: ve
return %0 : vector<2xf32>
}

// CHECK-LABEL: @gather_memref_non_unit_stride_read_1_element
// CHECK: %[[MASK:.*]] = vector.extract %arg2[0] : i1 from vector<1xi1>
// CHECK: %[[IDX:.*]] = vector.extract %arg1[0] : index from vector<1xindex>
// CHECK: %[[RET:.*]] = scf.if %[[MASK]] -> (vector<1xf32>) {
// CHECK: %[[VEC:.*]] = vector.load %arg0[%[[IDX]]] : memref<4xf32, strided<[2]>>, vector<1xf32>
// CHECK: %[[VAL:.*]] = vector.extract %[[VEC]][0] : f32 from vector<1xf32>
// CHECK: %[[RES:.*]] = vector.insert %[[VAL]], %arg3 [0] : f32 into vector<1xf32>
// CHECK: scf.yield %[[RES]] : vector<1xf32>
// CHECK: } else {
// CHECK: scf.yield %arg3 : vector<1xf32>
// CHECK: }
// CHECK: return %[[RET]] : vector<1xf32>
func.func @gather_memref_non_unit_stride_read_1_element(%base: memref<4xf32, strided<[2]>>, %v: vector<1xindex>, %mask: vector<1xi1>, %pass_thru: vector<1xf32>) -> vector<1xf32> {
%c0 = arith.constant 0 : index
%0 = vector.gather %base[%c0][%v], %mask, %pass_thru : memref<4xf32, strided<[2]>>, vector<1xindex>, vector<1xi1>, vector<1xf32> into vector<1xf32>
return %0 : vector<1xf32>
}

// CHECK-LABEL: @gather_memref_non_unit_stride_read_more_than_1_element
// CHECK: %[[CONST:.*]] = arith.constant 0 : index
// CHECK: %[[RET:.*]] = vector.gather %arg0[%[[CONST]]] [%arg1], %arg2, %arg3 : memref<4xf32, strided<[2]>>, vector<2xindex>, vector<2xi1>, vector<2xf32> into vector<2xf32>
// CHECK: return %[[RET]] : vector<2xf32>
func.func @gather_memref_non_unit_stride_read_more_than_1_element(%base: memref<4xf32, strided<[2]>>, %v: vector<2xindex>, %mask: vector<2xi1>, %pass_thru: vector<2xf32>) -> vector<2xf32> {
%c0 = arith.constant 0 : index
%0 = vector.gather %base[%c0][%v], %mask, %pass_thru : memref<4xf32, strided<[2]>>, vector<2xindex>, vector<2xi1>, vector<2xf32> into vector<2xf32>
return %0 : vector<2xf32>
}

// CHECK-LABEL: @gather_tensor_2d
// CHECK: scf.if
// CHECK: tensor.extract
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