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merged 2 commits into from
Jan 12, 2025
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VT: teach a special-case optz about samesign #122590

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589afe8
VT: teach a special-case optz about samesign
artagnon Jan 11, 2025
98efe55
VT: use CmpPredicate::getMatching; address review
artagnon Jan 11, 2025
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6 changes: 4 additions & 2 deletions llvm/lib/Analysis/ValueTracking.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -9495,7 +9495,8 @@ isImpliedCondICmps(const ICmpInst *LHS, CmpPredicate RPred, const Value *R0,
// must be positive if X >= Y and no overflow".
// Take SGT as an example: L0:x > L1:y and C >= 0
// ==> R0:(x -nsw y) < R1:(-C) is false
if ((LPred == ICmpInst::ICMP_SGT || LPred == ICmpInst::ICMP_SGE) &&
if ((ICmpInst::isSigned(LPred) || LPred.hasSameSign()) &&
(ICmpInst::isGE(LPred) || ICmpInst::isGT(LPred)) &&
match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
if (match(R1, m_NonPositive()) &&
isImpliedCondMatchingOperands(LPred, RPred) == false)
Expand All @@ -9504,7 +9505,8 @@ isImpliedCondICmps(const ICmpInst *LHS, CmpPredicate RPred, const Value *R0,

// Take SLT as an example: L0:x < L1:y and C <= 0
// ==> R0:(x -nsw y) < R1:(-C) is true
if ((LPred == ICmpInst::ICMP_SLT || LPred == ICmpInst::ICMP_SLE) &&
if ((ICmpInst::isSigned(LPred) || LPred.hasSameSign()) &&
(ICmpInst::isLE(LPred) || ICmpInst::isLT(LPred)) &&
match(R0, m_NSWSub(m_Specific(L0), m_Specific(L1)))) {
if (match(R1, m_NonNegative()) &&
isImpliedCondMatchingOperands(LPred, RPred) == true)
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10 changes: 2 additions & 8 deletions llvm/test/Analysis/ValueTracking/implied-condition-samesign.ll
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Expand Up @@ -207,10 +207,7 @@ define i32 @gt_sub_nsw(i32 %x, i32 %y) {
; CHECK: [[TAKEN]]:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
; CHECK-NEXT: [[ABSCOND:%.*]] = icmp samesign ult i32 [[SUB]], -1
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
; CHECK-NEXT: ret i32 [[ABS]]
; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: [[END]]:
; CHECK-NEXT: ret i32 0
;
Expand Down Expand Up @@ -239,10 +236,7 @@ define i32 @ge_sub_nsw(i32 %x, i32 %y) {
; CHECK: [[TAKEN]]:
; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[X]], [[Y]]
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[SUB]], 1
; CHECK-NEXT: [[NEG:%.*]] = xor i32 [[SUB]], -1
; CHECK-NEXT: [[ABSCOND:%.*]] = icmp samesign ult i32 [[SUB]], -1
; CHECK-NEXT: [[ABS:%.*]] = select i1 [[ABSCOND]], i32 [[NEG]], i32 [[ADD]]
; CHECK-NEXT: ret i32 [[ABS]]
; CHECK-NEXT: ret i32 [[ADD]]
; CHECK: [[END]]:
; CHECK-NEXT: ret i32 0
;
Expand Down
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