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[X86][GlobalISel] Support G_FCMP for scalar cases #123598

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Merged
merged 6 commits into from
Feb 7, 2025
Merged

[X86][GlobalISel] Support G_FCMP for scalar cases #123598

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c974d71
Support G_FCMP for scalar cases
Jan 20, 2025
87ef7b6
add 32 and 64 fcmp test
Jan 23, 2025
09557a0
update i686 with x87 having doubles
Jan 24, 2025
9b967b9
update review comments
Jan 30, 2025
e3759e0
update style
Jan 30, 2025
7777c64
remove ir from test
Feb 3, 2025
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16 changes: 14 additions & 2 deletions llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1048,17 +1048,29 @@ bool X86InstructionSelector::selectFCmp(MachineInstr &I,
break;
}

assert((LhsReg.isVirtual() && RhsReg.isVirtual()) &&
"Both arguments of FCMP need to be virtual!");
auto *LhsBank = RBI.getRegBank(LhsReg, MRI, TRI);
auto *RhsBank = RBI.getRegBank(RhsReg, MRI, TRI);
assert((LhsBank == RhsBank) &&
"Both banks assigned to FCMP arguments need to be same!");

// Compute the opcode for the CMP instruction.
unsigned OpCmp;
LLT Ty = MRI.getType(LhsReg);
switch (Ty.getSizeInBits()) {
default:
return false;
case 32:
OpCmp = X86::UCOMISSrr;
OpCmp = LhsBank->getID() == X86::PSRRegBankID ? X86::UCOM_FpIr32
: X86::UCOMISSrr;
break;
case 64:
OpCmp = X86::UCOMISDrr;
OpCmp = LhsBank->getID() == X86::PSRRegBankID ? X86::UCOM_FpIr64
: X86::UCOMISDrr;
break;
case 80:
OpCmp = X86::UCOM_FpIr80;
break;
}

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7 changes: 3 additions & 4 deletions llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
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Expand Up @@ -448,10 +448,9 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,

// fp comparison
getActionDefinitionsBuilder(G_FCMP)
.legalIf([=](const LegalityQuery &Query) {
return (HasSSE1 && typePairInSet(0, 1, {{s8, s32}})(Query)) ||
(HasSSE2 && typePairInSet(0, 1, {{s8, s64}})(Query));
})
.legalFor(HasSSE1 || UseX87, {s8, s32})
.legalFor(HasSSE2 || UseX87, {s8, s64})
.legalFor(UseX87, {s8, s80})
.clampScalar(0, s8, s8)
.clampScalar(1, s32, HasSSE2 ? s64 : s32)
.widenScalarToNextPow2(1);
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4 changes: 2 additions & 2 deletions llvm/lib/Target/X86/GISel/X86RegisterBankInfo.cpp
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Expand Up @@ -321,8 +321,8 @@ X86RegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {

unsigned Size = Ty1.getSizeInBits();
(void)Size;
assert((Size == 32 || Size == 64) && "Unsupported size for G_FCMP");

assert((Size == 32 || Size == 64 || Size == 80) &&
"Unsupported size for G_FCMP");
auto FpRegBank = getPartialMappingIdx(MI, Ty1, /* isFP= */ true);
OpRegBankIdx = {PMI_GPR8,
/* Predicate */ PMI_None, FpRegBank, FpRegBank};
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