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5 changes: 5 additions & 0 deletions llvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -644,6 +644,11 @@ static bool tryToShorten(Instruction *DeadI, int64_t &DeadStart,
DeadI->getIterator());
NewDestGEP->setDebugLoc(DeadIntrinsic->getDebugLoc());
DeadIntrinsic->setDest(NewDestGEP);
// Simply drop any dereferenceable attributes (memset with a constant length
// already implies dereferenceability by itself, so dropping is simpler than
// trying to adjust the dereferenceable size).
DeadIntrinsic->removeParamAttr(0, Attribute::Dereferenceable);
DeadIntrinsic->removeParamAttr(0, Attribute::DereferenceableOrNull);
}

// Update attached dbg.assign intrinsics. Assume 8-bit byte.
Expand Down
30 changes: 30 additions & 0 deletions llvm/test/Transforms/DeadStoreElimination/OverwriteStoreBegin.ll
Original file line number Diff line number Diff line change
Expand Up @@ -402,3 +402,33 @@ entry:
store i64 1, ptr %p, align 1
ret void
}

; Verify that we adjust/drop the dereferenceable attribute.
define void @dereferenceable(ptr nocapture %p) {
; CHECK-LABEL: @dereferenceable(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 4
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 24, i1 false)
; CHECK-NEXT: store i32 1, ptr [[P]], align 4
; CHECK-NEXT: ret void
;
entry:
call void @llvm.memset.p0.i64(ptr dereferenceable(28) align 4 %p, i8 0, i64 28, i1 false)
store i32 1, ptr %p, align 4
ret void
}

; Verify that we adjust/drop the dereferenceable_or_null attribute.
define void @dereferenceable_or_null(ptr nocapture %p) {
; CHECK-LABEL: @dereferenceable_or_null(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i8, ptr [[P:%.*]], i64 8
; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[TMP0]], i8 0, i64 20, i1 false)
; CHECK-NEXT: store i64 1, ptr [[P]], align 4
; CHECK-NEXT: ret void
;
entry:
call void @llvm.memset.p0.i64(ptr dereferenceable_or_null(28) align 4 %p, i8 0, i64 28, i1 false)
store i64 1, ptr %p, align 4
ret void
}