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[AVR] Backport #118015 and #121498 #125081

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67 changes: 1 addition & 66 deletions llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -35,26 +35,6 @@ namespace adjust {

using namespace llvm;

static void signed_width(unsigned Width, uint64_t Value,
std::string Description, const MCFixup &Fixup,
MCContext *Ctx = nullptr) {
if (!isIntN(Width, Value)) {
std::string Diagnostic = "out of range " + Description;

int64_t Min = minIntN(Width);
int64_t Max = maxIntN(Width);

Diagnostic += " (expected an integer in the range " + std::to_string(Min) +
" to " + std::to_string(Max) + ")";

if (Ctx) {
Ctx->reportError(Fixup.getLoc(), Diagnostic);
} else {
llvm_unreachable(Diagnostic.c_str());
}
}
}

static void unsigned_width(unsigned Width, uint64_t Value,
std::string Description, const MCFixup &Fixup,
MCContext *Ctx = nullptr) {
Expand Down Expand Up @@ -85,20 +65,6 @@ static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
AVR::fixups::adjustBranchTarget(Value);
}

/// Adjusts the value of a relative branch target before fixup application.
static void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup,
uint64_t &Value, MCContext *Ctx = nullptr) {
// Jumps are relative to the current instruction.
Value -= 2;

// We have one extra bit of precision because the value is rightshifted by
// one.
signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx);

// Rightshifts the value by one.
AVR::fixups::adjustBranchTarget(Value);
}

/// 22-bit absolute fixup.
///
/// Resolves to:
Expand All @@ -116,33 +82,6 @@ static void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
Value = (top << 6) | (middle << 3) | (bottom << 0);
}

/// 7-bit PC-relative fixup.
///
/// Resolves to:
/// 0000 00kk kkkk k000
/// Offset of 0 (so the result is left shifted by 3 bits before application).
static void fixup_7_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
MCContext *Ctx = nullptr) {
adjustRelativeBranch(Size, Fixup, Value, Ctx);

// Because the value may be negative, we must mask out the sign bits
Value &= 0x7f;
}

/// 12-bit PC-relative fixup.
/// Yes, the fixup is 12 bits even though the name says otherwise.
///
/// Resolves to:
/// 0000 kkkk kkkk kkkk
/// Offset of 0 (so the result isn't left-shifted before application).
static void fixup_13_pcrel(unsigned Size, const MCFixup &Fixup, uint64_t &Value,
MCContext *Ctx = nullptr) {
adjustRelativeBranch(Size, Fixup, Value, Ctx);

// Because the value may be negative, we must mask out the sign bits
Value &= 0xfff;
}

/// 6-bit fixup for the immediate operand of the STD/LDD family of
/// instructions.
///
Expand Down Expand Up @@ -264,10 +203,8 @@ void AVRAsmBackend::adjustFixupValue(const MCFixup &Fixup,
default:
llvm_unreachable("unhandled fixup");
case AVR::fixup_7_pcrel:
adjust::fixup_7_pcrel(Size, Fixup, Value, Ctx);
break;
case AVR::fixup_13_pcrel:
adjust::fixup_13_pcrel(Size, Fixup, Value, Ctx);
// Emitted as relocations, no fixup required.
break;
case AVR::fixup_call:
adjust::fixup_call(Size, Fixup, Value, Ctx);
Expand Down Expand Up @@ -518,8 +455,6 @@ bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
return Fixup.getKind() >= FirstLiteralRelocationKind;
case AVR::fixup_7_pcrel:
case AVR::fixup_13_pcrel:
// Always resolve relocations for PC-relative branches
return false;
case AVR::fixup_call:
return true;
}
Expand Down
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/AVR/jmp.ll
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Expand Up @@ -15,10 +15,11 @@ bb2:

declare i8 @bar(i8);

; CHECK: rcall .-2
; CHECK: rcall .+0
; CHECK-NEXT: 00000000: R_AVR_13_PCREL bar
; CHECK-NEXT: cpi r24, 0x7b
; CHECK-NEXT: brne .+4
; CHECK-NEXT: brne .+0
; CHECK-NEXT: 00000004: R_AVR_7_PCREL .text+0xa
; CHECK-NEXT: ldi r24, 0x64
; CHECK-NEXT: ret
; CHECK-NEXT: ldi r24, 0xc8
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brbc.s
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Expand Up @@ -17,8 +17,8 @@ foo:
; CHECK-NEXT: ; fixup A - offset: 0, value: (.Ltmp1-16)+2, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 23 f4 brvc .+8
; INST-NEXT: c0 f7 brsh .-16
; INST-NEXT: 03 f4 brvc .+0
; INST-NEXT: 00 f4 brsh .+0
; INST-NEXT: 59 f7 brne .-42
; INST-NEXT: 52 f7 brpl .-44
; INST-NEXT: 4c f7 brge .-46
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brbs.s
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Expand Up @@ -16,8 +16,8 @@ foo:
; CHECK-NEXT: ; fixup A - offset: 0, value: (.Ltmp1-12)+2, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 23 f0 brvs .+8
; INST-NEXT: d0 f3 brlo .-12
; INST-NEXT: 03 f0 brvs .+0
; INST-NEXT: 00 f0 brlo .+0
; INST-NEXT: 59 f3 breq .-42
; INST-NEXT: 52 f3 brmi .-44
; INST-NEXT: 4c f3 brlt .-46
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/MC/AVR/inst-brcc.s
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Expand Up @@ -22,7 +22,7 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 08 f5 brsh .+66
; INST-NEXT: a8 f7 brsh .-22
; INST-NEXT: 08 f5 brsh .+66
; INST-NEXT: 00 f4 brsh .+0
; INST-NEXT: 00 f4 brsh .+0
; INST-NEXT: 00 f4 brsh .+0
; INST-NEXT: 00 f4 brsh .+0
6 changes: 3 additions & 3 deletions llvm/test/MC/AVR/inst-brcs.s
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Expand Up @@ -22,7 +22,7 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 20 f0 brlo .+8
; INST-NEXT: 10 f0 brlo .+4
; INST-NEXT: 20 f0 brlo .+8
; INST-NEXT: 00 f0 brlo .+0
; INST-NEXT: 00 f0 brlo .+0
; INST-NEXT: 00 f0 brlo .+0
; INST-NEXT: 00 f0 brlo .+0
6 changes: 3 additions & 3 deletions llvm/test/MC/AVR/inst-breq.s
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Expand Up @@ -22,7 +22,7 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: b9 f3 breq .-18
; INST-NEXT: d1 f3 breq .-12
; INST-NEXT: b9 f3 breq .-18
; INST-NEXT: 01 f0 breq .+0
; INST-NEXT: 01 f0 breq .+0
; INST-NEXT: 01 f0 breq .+0
; INST-NEXT: 01 f0 breq .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brge.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: cc f4 brge .+50
; INST-NEXT: ac f4 brge .+42
; INST-NEXT: 04 f4 brge .+0
; INST-NEXT: 04 f4 brge .+0
; INST-NEXT: 04 f4 brge .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brhc.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 35 f4 brhc .+12
; INST-NEXT: 3d f4 brhc .+14
; INST-NEXT: 05 f4 brhc .+0
; INST-NEXT: 05 f4 brhc .+0
; INST-NEXT: 05 f4 brhc .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brhs.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: fd f2 brhs .-66
; INST-NEXT: 3d f0 brhs .+14
; INST-NEXT: 05 f0 brhs .+0
; INST-NEXT: 05 f0 brhs .+0
; INST-NEXT: 05 f0 brhs .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brid.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: af f4 brid .+42
; INST-NEXT: ff f4 brid .+62
; INST-NEXT: 07 f4 brid .+0
; INST-NEXT: 07 f4 brid .+0
; INST-NEXT: 07 f4 brid .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brie.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 57 f0 brie .+20
; INST-NEXT: a7 f0 brie .+40
; INST-NEXT: 07 f0 brie .+0
; INST-NEXT: 07 f0 brie .+0
; INST-NEXT: 07 f0 brie .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brlo.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 30 f0 brlo .+12
; INST-NEXT: 70 f0 brlo .+28
; INST-NEXT: 00 f0 brlo .+0
; INST-NEXT: 00 f0 brlo .+0
; INST-NEXT: 00 f0 brlo .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brlt.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 44 f0 brlt .+16
; INST-NEXT: 0c f0 brlt .+2
; INST-NEXT: 04 f0 brlt .+0
; INST-NEXT: 04 f0 brlt .+0
; INST-NEXT: 04 f0 brlt .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brmi.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 0a f1 brmi .+66
; INST-NEXT: ea f0 brmi .+58
; INST-NEXT: 02 f0 brmi .+0
; INST-NEXT: 02 f0 brmi .+0
; INST-NEXT: 02 f0 brmi .+0
6 changes: 3 additions & 3 deletions llvm/test/MC/AVR/inst-brne.s
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Expand Up @@ -22,7 +22,7 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 29 f4 brne .+10
; INST-NEXT: 09 f4 brne .+2
; INST-NEXT: 29 f4 brne .+10
; INST-NEXT: 01 f4 brne .+0
; INST-NEXT: 01 f4 brne .+0
; INST-NEXT: 01 f4 brne .+0
; INST-NEXT: 01 f4 brne .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brpl.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: d2 f7 brpl .-12
; INST-NEXT: 4a f4 brpl .+18
; INST-NEXT: 02 f4 brpl .+0
; INST-NEXT: 02 f4 brpl .+0
; INST-NEXT: 02 f4 brpl .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brsh.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 80 f4 brsh .+32
; INST-NEXT: 18 f5 brsh .+70
; INST-NEXT: 00 f4 brsh .+0
; INST-NEXT: 00 f4 brsh .+0
; INST-NEXT: 00 f4 brsh .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brtc.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: d6 f4 brtc .+52
; INST-NEXT: ce f4 brtc .+50
; INST-NEXT: 06 f4 brtc .+0
; INST-NEXT: 06 f4 brtc .+0
; INST-NEXT: 06 f4 brtc .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brts.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 4e f0 brts .+18
; INST-NEXT: 5e f0 brts .+22
; INST-NEXT: 06 f0 brts .+0
; INST-NEXT: 06 f0 brts .+0
; INST-NEXT: 06 f0 brts .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brvc.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 93 f7 brvc .-28
; INST-NEXT: 0b f7 brvc .-62
; INST-NEXT: 03 f4 brvc .+0
; INST-NEXT: 03 f4 brvc .+0
; INST-NEXT: 03 f4 brvc .+0
4 changes: 2 additions & 2 deletions llvm/test/MC/AVR/inst-brvs.s
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Expand Up @@ -19,6 +19,6 @@ bar:
; CHECK-NEXT: ; fixup A - offset: 0, value: bar, kind: fixup_7_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 4b f0 brvs .+18
; INST-NEXT: 83 f0 brvs .+32
; INST-NEXT: 03 f0 brvs .+0
; INST-NEXT: 03 f0 brvs .+0
; INST-NEXT: 03 f0 brvs .+0
6 changes: 3 additions & 3 deletions llvm/test/MC/AVR/inst-rcall.s
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Expand Up @@ -22,7 +22,7 @@ foo:

; INST-LABEL: <foo>:
; INST-NEXT: 00 d0 rcall .+0
; INST-NEXT: fc df rcall .-8
; INST-NEXT: 06 d0 rcall .+12
; INST-NEXT: 17 d0 rcall .+46
; INST-NEXT: 00 d0 rcall .+0
; INST-NEXT: 00 d0 rcall .+0
; INST-NEXT: 00 d0 rcall .+0
; INST-NEXT: ea df rcall .-44
18 changes: 9 additions & 9 deletions llvm/test/MC/AVR/inst-rjmp.s
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Expand Up @@ -43,18 +43,18 @@ x:
; CHECK-NEXT: ; fixup A - offset: 0, value: (.Ltmp6+4094)+2, kind: fixup_13_pcrel

; INST-LABEL: <foo>:
; INST-NEXT: 01 c0 rjmp .+2
; INST-NEXT: ff cf rjmp .-2
; INST-NEXT: fd cf rjmp .-6
; INST-NEXT: 04 c0 rjmp .+8
; INST-NEXT: 01 c0 rjmp .+2
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 00 c0 rjmp .+0
; INST-EMPTY:
; INST-LABEL: <end>:
; INST-NEXT: fe cf rjmp .-4
; INST-NEXT: fd cf rjmp .-6
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 00 c0 rjmp .+0
; INST-EMPTY:
; INST-LABEL: <x>:
; INST-NEXT: ff cf rjmp .-2
; INST-NEXT: 00 c0 rjmp .+0
; INST-NEXT: 0f c0 rjmp .+30
; INST-NEXT: ff c7 rjmp .+4094
; INST-NEXT: 00 c0 rjmp .+0
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