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[AMDGPU][True16][CodeGen] true16 codegen for FPMinMax pat #125107

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Merged
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Feb 4, 2025
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[AMDGPU][True16][CodeGen] true16 codegen for FPMinMax pat #125107

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14 changes: 14 additions & 0 deletions llvm/lib/Target/AMDGPU/SIInstructions.td
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Original file line number Diff line number Diff line change
Expand Up @@ -3767,6 +3767,13 @@ def : FPMinCanonMaxPat<V_MINMAX_F32_e64, f32, fmaxnum_like, fminnum_like_oneuse>
def : FPMinCanonMaxPat<V_MAXMIN_F32_e64, f32, fminnum_like, fmaxnum_like_oneuse>;
}

let True16Predicate = UseRealTrue16Insts in {
def : FPMinMaxPat<V_MINMAX_F16_t16_e64, f16, fmaxnum_like, fminnum_like_oneuse>;
def : FPMinMaxPat<V_MAXMIN_F16_t16_e64, f16, fminnum_like, fmaxnum_like_oneuse>;
def : FPMinCanonMaxPat<V_MINMAX_F16_t16_e64, f16, fmaxnum_like, fminnum_like_oneuse>;
def : FPMinCanonMaxPat<V_MAXMIN_F16_t16_e64, f16, fminnum_like, fmaxnum_like_oneuse>;
}

let True16Predicate = UseFakeTrue16Insts in {
def : FPMinMaxPat<V_MINMAX_F16_fake16_e64, f16, fmaxnum_like, fminnum_like_oneuse>;
def : FPMinMaxPat<V_MAXMIN_F16_fake16_e64, f16, fminnum_like, fmaxnum_like_oneuse>;
Expand Down Expand Up @@ -3796,6 +3803,13 @@ def : FPMinCanonMaxPat<V_MINIMUMMAXIMUM_F32_e64, f32, DivergentBinFrag<fmaximum>
def : FPMinCanonMaxPat<V_MAXIMUMMINIMUM_F32_e64, f32, DivergentBinFrag<fminimum>, fmaximum_oneuse>;
}

let True16Predicate = UseRealTrue16Insts, SubtargetPredicate = isGFX12Plus in {
def : FPMinMaxPat<V_MINIMUMMAXIMUM_F16_t16_e64, f16, DivergentBinFrag<fmaximum>, fminimum_oneuse>;
def : FPMinMaxPat<V_MAXIMUMMINIMUM_F16_t16_e64, f16, DivergentBinFrag<fminimum>, fmaximum_oneuse>;
def : FPMinCanonMaxPat<V_MINIMUMMAXIMUM_F16_t16_e64, f16, DivergentBinFrag<fmaximum>, fminimum_oneuse>;
def : FPMinCanonMaxPat<V_MAXIMUMMINIMUM_F16_t16_e64, f16, DivergentBinFrag<fminimum>, fmaximum_oneuse>;
}

let True16Predicate = UseFakeTrue16Insts, SubtargetPredicate = isGFX12Plus in {
def : FPMinMaxPat<V_MINIMUMMAXIMUM_F16_fake16_e64, f16, DivergentBinFrag<fmaximum>, fminimum_oneuse>;
def : FPMinMaxPat<V_MAXIMUMMINIMUM_F16_fake16_e64, f16, DivergentBinFrag<fminimum>, fmaximum_oneuse>;
Expand Down
84 changes: 70 additions & 14 deletions llvm/test/CodeGen/AMDGPU/minimummaximum.ll
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@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,SDAG %s
; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GISEL %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,SDAG,SDAG-TRUE16 %s
; RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,SDAG,SDAG-FAKE16 %s
; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GISEL,GISEL-TRUE16 %s
; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -mattr=-real-true16 -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX12,GISEL,GISEL-FAKE16 %s

define amdgpu_ps float @test_minmax_f32(float %a, float %b, float %c) {
; GFX12-LABEL: test_minmax_f32:
Expand Down Expand Up @@ -72,30 +74,84 @@ define amdgpu_ps float @test_maxmin_commuted_f32(float %a, float %b, float %c) {
}

define amdgpu_ps half @test_minmax_f16(half %a, half %b, half %c) {
; GFX12-LABEL: test_minmax_f16:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_maximumminimum_f16 v0, v0, v1, v2
; GFX12-NEXT: ; return to shader part epilog
; SDAG-TRUE16-LABEL: test_minmax_f16:
; SDAG-TRUE16: ; %bb.0:
; SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
; SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.l
; SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; SDAG-TRUE16-NEXT: v_maximumminimum_f16 v0.l, v0.l, v0.h, v1.l
; SDAG-TRUE16-NEXT: ; return to shader part epilog
;
; SDAG-FAKE16-LABEL: test_minmax_f16:
; SDAG-FAKE16: ; %bb.0:
; SDAG-FAKE16-NEXT: v_maximumminimum_f16 v0, v0, v1, v2
; SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GISEL-TRUE16-LABEL: test_minmax_f16:
; GISEL-TRUE16: ; %bb.0:
; GISEL-TRUE16-NEXT: v_maximumminimum_f16 v0.l, v0.l, v1.l, v2.l
; GISEL-TRUE16-NEXT: ; return to shader part epilog
;
; GISEL-FAKE16-LABEL: test_minmax_f16:
; GISEL-FAKE16: ; %bb.0:
; GISEL-FAKE16-NEXT: v_maximumminimum_f16 v0, v0, v1, v2
; GISEL-FAKE16-NEXT: ; return to shader part epilog
%max = call half @llvm.maximum.f16(half %a, half %b)
%minmax = call half @llvm.minimum.f16(half %max, half %c)
ret half %minmax
}

define amdgpu_ps half @test_minmax_commuted_f16(half %a, half %b, half %c) {
; GFX12-LABEL: test_minmax_commuted_f16:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_maximumminimum_f16 v0, v0, v1, v2
; GFX12-NEXT: ; return to shader part epilog
; SDAG-TRUE16-LABEL: test_minmax_commuted_f16:
; SDAG-TRUE16: ; %bb.0:
; SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
; SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.l
; SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; SDAG-TRUE16-NEXT: v_maximumminimum_f16 v0.l, v0.l, v0.h, v1.l
; SDAG-TRUE16-NEXT: ; return to shader part epilog
;
; SDAG-FAKE16-LABEL: test_minmax_commuted_f16:
; SDAG-FAKE16: ; %bb.0:
; SDAG-FAKE16-NEXT: v_maximumminimum_f16 v0, v0, v1, v2
; SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GISEL-TRUE16-LABEL: test_minmax_commuted_f16:
; GISEL-TRUE16: ; %bb.0:
; GISEL-TRUE16-NEXT: v_maximumminimum_f16 v0.l, v0.l, v1.l, v2.l
; GISEL-TRUE16-NEXT: ; return to shader part epilog
;
; GISEL-FAKE16-LABEL: test_minmax_commuted_f16:
; GISEL-FAKE16: ; %bb.0:
; GISEL-FAKE16-NEXT: v_maximumminimum_f16 v0, v0, v1, v2
; GISEL-FAKE16-NEXT: ; return to shader part epilog
%max = call half @llvm.maximum.f16(half %a, half %b)
%minmax = call half @llvm.minimum.f16(half %c, half %max)
ret half %minmax
}

define amdgpu_ps half @test_maxmin_commuted_f16(half %a, half %b, half %c) {
; GFX12-LABEL: test_maxmin_commuted_f16:
; GFX12: ; %bb.0:
; GFX12-NEXT: v_minimummaximum_f16 v0, v0, v1, v2
; GFX12-NEXT: ; return to shader part epilog
; SDAG-TRUE16-LABEL: test_maxmin_commuted_f16:
; SDAG-TRUE16: ; %bb.0:
; SDAG-TRUE16-NEXT: v_mov_b16_e32 v0.h, v1.l
; SDAG-TRUE16-NEXT: v_mov_b16_e32 v1.l, v2.l
; SDAG-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
; SDAG-TRUE16-NEXT: v_minimummaximum_f16 v0.l, v0.l, v0.h, v1.l
; SDAG-TRUE16-NEXT: ; return to shader part epilog
;
; SDAG-FAKE16-LABEL: test_maxmin_commuted_f16:
; SDAG-FAKE16: ; %bb.0:
; SDAG-FAKE16-NEXT: v_minimummaximum_f16 v0, v0, v1, v2
; SDAG-FAKE16-NEXT: ; return to shader part epilog
;
; GISEL-TRUE16-LABEL: test_maxmin_commuted_f16:
; GISEL-TRUE16: ; %bb.0:
; GISEL-TRUE16-NEXT: v_minimummaximum_f16 v0.l, v0.l, v1.l, v2.l
; GISEL-TRUE16-NEXT: ; return to shader part epilog
;
; GISEL-FAKE16-LABEL: test_maxmin_commuted_f16:
; GISEL-FAKE16: ; %bb.0:
; GISEL-FAKE16-NEXT: v_minimummaximum_f16 v0, v0, v1, v2
; GISEL-FAKE16-NEXT: ; return to shader part epilog
%min = call half @llvm.minimum.f16(half %a, half %b)
%maxmin = call half @llvm.maximum.f16(half %c, half %min)
ret half %maxmin
Expand Down
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