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3 changes: 3 additions & 0 deletions llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -489,6 +489,9 @@ MachineInstr *TwoAddressInstructionImpl::findOnlyInterestingUse(
bool &IsDstPhys) const {
MachineOperand *UseOp = nullptr;
for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
if (MO.isUndef())
continue;

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Unrelated to your patch, but should there be a break after line 499?

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It probably should, but I'd need to look exactly at all the implementations of isPlainlyKilled. At least the LiveIntervals one checks there's only one value in the interval

MachineInstr *MI = MO.getParent();
if (MI->getParent() != MBB)
return nullptr;
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24 changes: 24 additions & 0 deletions llvm/test/CodeGen/ARM/twoaddress-asserts-liveints-undef-use.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,24 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs -run-pass=liveintervals,twoaddressinstruction -o - %s | FileCheck %s

---
name: undef_use_asserts_lr
tracksRegLiveness: true
noPhis: true
body: |
bb.0:
liveins: $q0

; CHECK-LABEL: name: undef_use_asserts_lr
; CHECK: liveins: $q0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:mqpr = COPY $q0
; CHECK-NEXT: [[DEF:%[0-9]+]]:spr = IMPLICIT_DEF
; CHECK-NEXT: [[COPY1:%[0-9]+]]:mqpr = COPY [[COPY]]
; CHECK-NEXT: dead [[COPY1:%[0-9]+]].ssub_2:mqpr = COPY [[DEF]]
; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:spr = COPY undef [[COPY1]].ssub_3
%0:mqpr = COPY $q0
%1:spr = IMPLICIT_DEF
%2:mqpr = INSERT_SUBREG %0, %1, %subreg.ssub_2
dead %4:spr = COPY undef %2.ssub_3
...