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[msan] Handle llvm.bitreverse by applying intrinsic to shadow #125606

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Merged
merged 1 commit into from
Feb 4, 2025
Merged

[msan] Handle llvm.bitreverse by applying intrinsic to shadow #125606

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4 changes: 4 additions & 0 deletions llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4298,6 +4298,10 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
case Intrinsic::abs:
handleAbsIntrinsic(I);
break;
case Intrinsic::bitreverse:
handleIntrinsicByApplyingToShadow(I, I.getIntrinsicID(),
/*trailingVerbatimArgs*/ 0);
break;
case Intrinsic::is_fpclass:
handleIsFpClass(I);
break;
Expand Down
47 changes: 30 additions & 17 deletions llvm/test/Instrumentation/MemorySanitizer/bitreverse.ll
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Original file line number Diff line number Diff line change
@@ -1,9 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt < %s -passes=msan -S | FileCheck %s
;
; The heuristic handler for llvm.reverse is incorrect because it doesn't
; reverse the shadow.
;
; Forked from llvm/test/CodeGen/X86/bitreverse.ll

target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
Expand All @@ -16,8 +13,9 @@ define <2 x i16> @test_bitreverse_v2i16(<2 x i16> %a) nounwind #0 {
; CHECK-SAME: <2 x i16> [[A:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[A]])
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store <2 x i16> [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret <2 x i16> [[B]]
;
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
Expand All @@ -31,8 +29,9 @@ define i64 @test_bitreverse_i64(i64 %a) nounwind #0 {
; CHECK-SAME: i64 [[A:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i64 @llvm.bitreverse.i64(i64 [[A]])
; CHECK-NEXT: store i64 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i64 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i64 [[B]]
;
%b = call i64 @llvm.bitreverse.i64(i64 %a)
Expand All @@ -46,8 +45,9 @@ define i32 @test_bitreverse_i32(i32 %a) nounwind #0 {
; CHECK-SAME: i32 [[A:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i32 @llvm.bitreverse.i32(i32 [[A]])
; CHECK-NEXT: store i32 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i32 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i32 [[B]]
;
%b = call i32 @llvm.bitreverse.i32(i32 %a)
Expand All @@ -61,8 +61,9 @@ define i24 @test_bitreverse_i24(i24 %a) nounwind #0 {
; CHECK-SAME: i24 [[A:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i24, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i24 @llvm.bitreverse.i24(i24 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i24 @llvm.bitreverse.i24(i24 [[A]])
; CHECK-NEXT: store i24 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i24 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i24 [[B]]
;
%b = call i24 @llvm.bitreverse.i24(i24 %a)
Expand All @@ -76,8 +77,9 @@ define i16 @test_bitreverse_i16(i16 %a) nounwind #0 {
; CHECK-SAME: i16 [[A:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i16 @llvm.bitreverse.i16(i16 [[A]])
; CHECK-NEXT: store i16 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i16 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i16 [[B]]
;
%b = call i16 @llvm.bitreverse.i16(i16 %a)
Expand All @@ -91,8 +93,9 @@ define i8 @test_bitreverse_i8(i8 %a) #0 {
; CHECK-SAME: i8 [[A:%.*]]) #[[ATTR2:[0-9]+]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[A]])
; CHECK-NEXT: store i8 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i8 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i8 [[B]]
;
%b = call i8 @llvm.bitreverse.i8(i8 %a)
Expand All @@ -106,8 +109,9 @@ define i4 @test_bitreverse_i4(i4 %a) #0 {
; CHECK-SAME: i4 [[A:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i4, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i4 @llvm.bitreverse.i4(i4 [[A]])
; CHECK-NEXT: store i4 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i4 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i4 [[B]]
;
%b = call i4 @llvm.bitreverse.i4(i4 %a)
Expand All @@ -120,8 +124,9 @@ define <2 x i16> @fold_v2i16() #0 {
; CHECK-LABEL: define <2 x i16> @fold_v2i16(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP1:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> zeroinitializer)
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> <i16 15, i16 3840>)
; CHECK-NEXT: store <2 x i16> zeroinitializer, ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret <2 x i16> [[B]]
;
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> <i16 15, i16 3840>)
Expand All @@ -132,8 +137,9 @@ define i24 @fold_i24() #0 {
; CHECK-LABEL: define i24 @fold_i24(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP1:%.*]] = call i24 @llvm.bitreverse.i24(i24 0)
; CHECK-NEXT: [[B:%.*]] = call i24 @llvm.bitreverse.i24(i24 4096)
; CHECK-NEXT: store i24 0, ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i24 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i24 [[B]]
;
%b = call i24 @llvm.bitreverse.i24(i24 4096)
Expand All @@ -144,8 +150,9 @@ define i8 @fold_i8() #0 {
; CHECK-LABEL: define i8 @fold_i8(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP1:%.*]] = call i8 @llvm.bitreverse.i8(i8 0)
; CHECK-NEXT: [[B:%.*]] = call i8 @llvm.bitreverse.i8(i8 15)
; CHECK-NEXT: store i8 0, ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i8 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i8 [[B]]
;
%b = call i8 @llvm.bitreverse.i8(i8 15)
Expand All @@ -156,8 +163,9 @@ define i4 @fold_i4() #0 {
; CHECK-LABEL: define i4 @fold_i4(
; CHECK-SAME: ) #[[ATTR2]] {
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP1:%.*]] = call i4 @llvm.bitreverse.i4(i4 0)
; CHECK-NEXT: [[B:%.*]] = call i4 @llvm.bitreverse.i4(i4 -8)
; CHECK-NEXT: store i4 0, ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i4 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i4 [[B]]
;
%b = call i4 @llvm.bitreverse.i4(i4 8)
Expand All @@ -171,9 +179,11 @@ define i8 @identity_i8(i8 %a) #0 {
; CHECK-SAME: i8 [[A:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[A]])
; CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[TMP2]])
; CHECK-NEXT: [[C:%.*]] = call i8 @llvm.bitreverse.i8(i8 [[B]])
; CHECK-NEXT: store i8 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i8 [[TMP3]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i8 [[C]]
;
%b = call i8 @llvm.bitreverse.i8(i8 %a)
Expand All @@ -186,9 +196,11 @@ define <2 x i16> @identity_v2i16(<2 x i16> %a) #0 {
; CHECK-SAME: <2 x i16> [[A:%.*]]) #[[ATTR2]] {
; CHECK-NEXT: [[TMP1:%.*]] = load <2 x i16>, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[TMP1]])
; CHECK-NEXT: [[B:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[A]])
; CHECK-NEXT: [[TMP3:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[TMP2]])
; CHECK-NEXT: [[C:%.*]] = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> [[B]])
; CHECK-NEXT: store <2 x i16> [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store <2 x i16> [[TMP3]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret <2 x i16> [[C]]
;
%b = call <2 x i16> @llvm.bitreverse.v2i16(<2 x i16> %a)
Expand All @@ -206,8 +218,9 @@ define i528 @large_promotion(i528 %A) nounwind #0 {
; CHECK-SAME: i528 [[A:%.*]]) #[[ATTR1]] {
; CHECK-NEXT: [[TMP1:%.*]] = load i528, ptr @__msan_param_tls, align 8
; CHECK-NEXT: call void @llvm.donothing()
; CHECK-NEXT: [[TMP2:%.*]] = call i528 @llvm.bitreverse.i528(i528 [[TMP1]])
; CHECK-NEXT: [[Z:%.*]] = call i528 @llvm.bitreverse.i528(i528 [[A]])
; CHECK-NEXT: store i528 [[TMP1]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: store i528 [[TMP2]], ptr @__msan_retval_tls, align 8
; CHECK-NEXT: ret i528 [[Z]]
;
%Z = call i528 @llvm.bitreverse.i528(i528 %A)
Expand Down