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DAG: Avoid introducing stack usage in vector->int bitcast int op promotion #125636

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Merged
merged 3 commits into from
Feb 4, 2025
Merged

DAG: Avoid introducing stack usage in vector->int bitcast int op promotion #125636

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6f05023
AMDGPU: Add baseline tests for some bitcast lowering
arsenm Feb 4, 2025
8810bee
DAG: Avoid introducing stack usage in vector->int bitcast int op prom…
arsenm Feb 4, 2025
4b47549
Skip big endian for now
arsenm Feb 4, 2025
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23 changes: 23 additions & 0 deletions llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -566,6 +566,29 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
}
}

// TODO: Handle big endian
if (!NOutVT.isVector() && InOp.getValueType().isVector() &&
DAG.getDataLayout().isLittleEndian()) {
// Pad the vector operand with undef and cast to a wider integer.
EVT EltVT = InOp.getValueType().getVectorElementType();
TypeSize EltSize = EltVT.getSizeInBits();
TypeSize OutSize = NOutVT.getSizeInBits();

if (OutSize.hasKnownScalarFactor(EltSize)) {
unsigned NumEltsWithPadding = OutSize.getKnownScalarFactor(EltSize);
EVT WideVecVT =
EVT::getVectorVT(*DAG.getContext(), EltVT, NumEltsWithPadding);

if (isTypeLegal(WideVecVT)) {
SDValue Inserted = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, WideVecVT,
DAG.getUNDEF(WideVecVT), InOp,
DAG.getVectorIdxConstant(0, dl));

return DAG.getNode(ISD::BITCAST, dl, NOutVT, Inserted);
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@topperc topperc Feb 4, 2025

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Do we need a shift after this for Big Endian like the TypeWidenVector case on line 540?

}
}
}

return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT,
CreateStackStoreLoad(InOp, OutVT));
}
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