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8a07b3d
Add support for flag output operand "=@cc" for SystemZ and optimizing…
anoopkg6 Feb 5, 2025
d3f3c03
Removed triple check in CGStmt.cpp and using StringRef in SystemZ.h.
Feb 7, 2025
062e03a
clang test causing pr build failure.
Feb 7, 2025
5aef564
Add Preprocessor test for flag output operand and some cleanup for c …
Feb 10, 2025
f10e46b
Merge branch 'main' into asm_llvm
anoopkg6 Feb 10, 2025
2ab7a75
Fixed clang outputting extra byte '\7F' in clang test and fix a warni…
Feb 11, 2025
132cf31
Merge branch 'asm_llvm' of github.com:anoopkg6/llvm-project into asm_…
Feb 11, 2025
fccc70e
Incorporated suggestions in review.
Feb 13, 2025
7ea0c5f
- Changes relating to ConstraintInfo for setting flag output CC upper…
Feb 25, 2025
d787c8b
Incorporated changes for code review feedback.
Apr 21, 2025
82a26f7
Merge branch 'main' into asm_llvm
anoopkg6 Apr 21, 2025
c5c34d3
Added pattern for XOR, OR, TM, AND, ICMP to PerformDAGCombine and sim…
Jun 24, 2025
0dc6995
Incorporated code review feedback.
Jun 25, 2025
e2467a6
Incorporated code review feedback.
Jun 30, 2025
44f2b5d
Incorporated code review feedback.
Jul 2, 2025
12cc13c
Incorporated code review feedback.
Jul 10, 2025
956c53c
Merge branch 'main' into asm_llvm
anoopkg6 Jul 10, 2025
557113f
1. Incorporated code review feedback.
Jul 15, 2025
78cdca5
Eliminated combinedOR/combineXOR/combineAND altogether and collapsed …
Jul 16, 2025
2ce4915
Incorporated code review changes for combineLogicalOpCCMask, which ma…
Jul 25, 2025
714682f
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 4, 2025
9d5d4eb
1. Implement SDValue simplifyAssumingCCVal to evaluate Val under the …
Aug 6, 2025
28c92f4
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 17, 2025
140bd6a
1. Return array of SDValue from simplifyAssumingCCVal and remove use of
Aug 17, 2025
c13c7d7
Fix Windows build failure because of __builtin_clz.
Aug 17, 2025
86abe9b
1. Remove converting SDValue into int, rather operate via embedded AP…
Aug 21, 2025
1915eb8
Incorporate code review suggestions.
Aug 24, 2025
85d1590
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 24, 2025
b04a070
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 26, 2025
d4ce3c0
Incorporate code review feedback.
Aug 26, 2025
7fcaafe
Merge branch 'asm_llvm' of github.com:anoopkg6/llvm-project into asm_…
Aug 26, 2025
1dcf4c9
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 27, 2025
69f8f25
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 28, 2025
e2f03da
Making flag output operand infrastructure more generic as output oper…
Aug 28, 2025
365de38
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 28, 2025
a481934
1. Use std::optional<std::pair<unsigned, unsigned>> for getOutputoper…
Aug 28, 2025
f058cc8
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Aug 29, 2025
10c60fa
1. Added some comments.
Aug 29, 2025
4ad8f4d
1. Moved getCCResult above SystemZTargetLowering::LowerAsmOutputForCo…
Sep 9, 2025
faa910e
Add initial version of IL tests for flag output operand.
Sep 10, 2025
c7d191b
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Sep 10, 2025
2887d4d
Merge branch 'asm_llvm' of github.com:anoopkg6/llvm-project into asm_…
Sep 10, 2025
307ff6f
Add clang tests for flag output operand.
Sep 11, 2025
092a78a
Auto-generate checks for clang test using update_cc_test_checks.py.
Sep 11, 2025
6174bb6
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Sep 12, 2025
2b3c344
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Sep 24, 2025
263b402
1. Optimize the cases where select_ccmask has TrueVal/FalseVal as tem…
Sep 24, 2025
7078f8c
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Sep 25, 2025
3a28826
Combine select_ccmask nodes with no-const TrueVal/FalseVal and same C…
Sep 25, 2025
ef554e8
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Sep 26, 2025
bf1b063
Incorporate minor code review feedbak.
Sep 26, 2025
c095cee
Merge branch 'llvm:main' into asm_llvm
anoopkg6 Oct 3, 2025
64a432f
Merge branch 'main' into asm_llvm
uweigand Oct 14, 2025
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9 changes: 9 additions & 0 deletions clang/include/clang/Basic/TargetInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -1122,6 +1122,7 @@ class TargetInfo : public TransferrableTargetInfo,

std::string ConstraintStr; // constraint: "=rm"
std::string Name; // Operand name: [foo] with no []'s.

public:
ConstraintInfo(StringRef ConstraintStr, StringRef Name)
: Flags(0), TiedOperand(-1), ConstraintStr(ConstraintStr.str()),
Expand Down Expand Up @@ -1195,6 +1196,14 @@ class TargetInfo : public TransferrableTargetInfo,
TiedOperand = N;
// Don't copy Name or constraint string.
}

// CC range can be set by targets supporting flag output operand.
void setFlagOutputCCUpperBound(unsigned CCBound) {
// Using ImmRange.Max to store CC upper bound. Interval [0, CCBound).
ImmRange.Max = CCBound;
ImmRange.isConstrained = true;
}
unsigned getFlagOutputCCUpperBound() const { return ImmRange.Max; }
};

/// Validate register name used for global register variables.
Expand Down
1 change: 1 addition & 0 deletions clang/lib/Basic/Targets/AArch64.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1556,6 +1556,7 @@ bool AArch64TargetInfo::validateAsmConstraint(
if (const unsigned Len = matchAsmCCConstraint(Name)) {
Name += Len - 1;
Info.setAllowsRegister();
Info.setFlagOutputCCUpperBound(2);
return true;
}
}
Expand Down
13 changes: 13 additions & 0 deletions clang/lib/Basic/Targets/SystemZ.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -99,6 +99,16 @@ bool SystemZTargetInfo::validateAsmConstraint(
case 'T': // Likewise, plus an index
Info.setAllowsMemory();
return true;
case '@':
// CC condition changes.
if (StringRef(Name) == "@cc") {
Name += 2;
Info.setAllowsRegister();
// SystemZ has 2-bits CC, and hence Interval [0, 4).
Info.setFlagOutputCCUpperBound(4);
return true;
}
return false;
}
}

Expand Down Expand Up @@ -161,6 +171,9 @@ unsigned SystemZTargetInfo::getMinGlobalAlign(uint64_t Size,

void SystemZTargetInfo::getTargetDefines(const LangOptions &Opts,
MacroBuilder &Builder) const {
// Inline assembly supports SystemZ flag outputs.
Builder.defineMacro("__GCC_ASM_FLAG_OUTPUTS__");

Builder.defineMacro("__s390__");
Builder.defineMacro("__s390x__");
Builder.defineMacro("__zarch__");
Expand Down
6 changes: 6 additions & 0 deletions clang/lib/Basic/Targets/SystemZ.h
Original file line number Diff line number Diff line change
Expand Up @@ -134,6 +134,12 @@ class LLVM_LIBRARY_VISIBILITY SystemZTargetInfo : public TargetInfo {

std::string convertConstraint(const char *&Constraint) const override {
switch (Constraint[0]) {
case '@': // Flag output operand.
if (llvm::StringRef(Constraint) == "@cc") {
Constraint += 2;
return std::string("{@cc}");
}
break;
case 'p': // Keep 'p' constraint.
return std::string("p");
case 'Z':
Expand Down
1 change: 1 addition & 0 deletions clang/lib/Basic/Targets/X86.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1584,6 +1584,7 @@ bool X86TargetInfo::validateAsmConstraint(
if (auto Len = matchAsmCCConstraint(Name)) {
Name += Len - 1;
Info.setAllowsRegister();
Info.setFlagOutputCCUpperBound(2);
return true;
}
return false;
Expand Down
24 changes: 14 additions & 10 deletions clang/lib/CodeGen/CGStmt.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2639,7 +2639,7 @@ EmitAsmStores(CodeGenFunction &CGF, const AsmStmt &S,
const llvm::ArrayRef<LValue> ResultRegDests,
const llvm::ArrayRef<QualType> ResultRegQualTys,
const llvm::BitVector &ResultTypeRequiresCast,
const llvm::BitVector &ResultRegIsFlagReg) {
const std::vector<unsigned> &ResultFlagRegCCBound) {
CGBuilderTy &Builder = CGF.Builder;
CodeGenModule &CGM = CGF.CGM;
llvm::LLVMContext &CTX = CGF.getLLVMContext();
Expand All @@ -2650,18 +2650,23 @@ EmitAsmStores(CodeGenFunction &CGF, const AsmStmt &S,
// ResultRegDests can be also populated by addReturnRegisterOutputs() above,
// in which case its size may grow.
assert(ResultTypeRequiresCast.size() <= ResultRegDests.size());
assert(ResultRegIsFlagReg.size() <= ResultRegDests.size());
assert(ResultFlagRegCCBound.size() <= ResultRegDests.size());

for (unsigned i = 0, e = RegResults.size(); i != e; ++i) {
llvm::Value *Tmp = RegResults[i];
llvm::Type *TruncTy = ResultTruncRegTypes[i];

if ((i < ResultRegIsFlagReg.size()) && ResultRegIsFlagReg[i]) {
if ((i < ResultFlagRegCCBound.size()) && ResultFlagRegCCBound[i]) {
// Target must guarantee the Value `Tmp` here is lowered to a boolean
// value.
llvm::Constant *Two = llvm::ConstantInt::get(Tmp->getType(), 2);
// Lowering 'Tmp' as - 'icmp ult %Tmp , CCUpperBound'.
unsigned CCUpperBound = ResultFlagRegCCBound[i];
assert((CCUpperBound == 2 || CCUpperBound == 4) &&
"CC upper bound out of range!");
llvm::Constant *CCUpperBoundConst =
llvm::ConstantInt::get(Tmp->getType(), CCUpperBound);
llvm::Value *IsBooleanValue =
Builder.CreateCmp(llvm::CmpInst::ICMP_ULT, Tmp, Two);
Builder.CreateCmp(llvm::CmpInst::ICMP_ULT, Tmp, CCUpperBoundConst);
llvm::Function *FnAssume = CGM.getIntrinsic(llvm::Intrinsic::assume);
Builder.CreateCall(FnAssume, IsBooleanValue);
}
Expand Down Expand Up @@ -2788,7 +2793,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
std::vector<llvm::Type *> ArgElemTypes;
std::vector<llvm::Value*> Args;
llvm::BitVector ResultTypeRequiresCast;
llvm::BitVector ResultRegIsFlagReg;
std::vector<unsigned> ResultFlagRegCCBound;

// Keep track of inout constraints.
std::string InOutConstraints;
Expand Down Expand Up @@ -2846,8 +2851,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
ResultRegQualTys.push_back(QTy);
ResultRegDests.push_back(Dest);

bool IsFlagReg = llvm::StringRef(OutputConstraint).starts_with("{@cc");
ResultRegIsFlagReg.push_back(IsFlagReg);
ResultFlagRegCCBound.push_back(Info.getFlagOutputCCUpperBound());

llvm::Type *Ty = ConvertTypeForMem(QTy);
const bool RequiresCast = Info.allowsRegister() &&
Expand Down Expand Up @@ -3194,7 +3198,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {

EmitAsmStores(*this, S, RegResults, ResultRegTypes, ResultTruncRegTypes,
ResultRegDests, ResultRegQualTys, ResultTypeRequiresCast,
ResultRegIsFlagReg);
ResultFlagRegCCBound);

// If this is an asm goto with outputs, repeat EmitAsmStores, but with a
// different insertion point; one for each indirect destination and with
Expand All @@ -3205,7 +3209,7 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
Builder.SetInsertPoint(Succ, --(Succ->end()));
EmitAsmStores(*this, S, CBRRegResults[Succ], ResultRegTypes,
ResultTruncRegTypes, ResultRegDests, ResultRegQualTys,
ResultTypeRequiresCast, ResultRegIsFlagReg);
ResultTypeRequiresCast, ResultFlagRegCCBound);
}
}
}
Expand Down
33 changes: 33 additions & 0 deletions clang/test/CodeGen/inline-asm-systemz-flag-output.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,33 @@
// RUN: %clang_cc1 -O2 -triple s390x-linux -emit-llvm -o - %s | FileCheck %s

int foo_012(int x) {
// CHECK-LABEL: @foo_012
// CHECK: = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 %x)
int cc;
asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
return cc == 0 || cc == 1 || cc == 2 ? 42 : 0;
}

int foo_013(int x) {
// CHECK-LABEL: @foo_013
// CHECK: = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 %x)
int cc;
asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
return cc == 0 || cc == 1 || cc == 3 ? 42 : 0;
}

int foo_023(int x) {
// CHECK-LABEL: @foo_023
// CHECK: = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 %x)
int cc;
asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
return cc == 0 || cc == 2 || cc == 3 ? 42 : 0;
}

int foo_123(int x) {
// CHECK-LABEL: @foo_123
// CHECK: = tail call { i32, i32 } asm "ahi $0,42\0A", "=d,={@cc},0"(i32 %x)
int cc;
asm ("ahi %[x],42\n" : [x] "+d"(x), "=@cc" (cc));
return cc == 1 || cc == 2 || cc == 3 ? 42 : 0;
}
4 changes: 4 additions & 0 deletions clang/test/Preprocessor/systemz_asm_flag_outut.c
Original file line number Diff line number Diff line change
@@ -0,0 +1,4 @@
// RUN: %clang -target systemz-unknown-unknown -x c -E -dM -o - %s | FileCheck -match-full-lines %s
// RUN: %clang -target s390x-unknown-unknown -x c -E -dM -o - %s | FileCheck -match-full-lines %s

// CHECK: #define __GCC_ASM_FLAG_OUTPUTS__ 1
1 change: 0 additions & 1 deletion llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2784,7 +2784,6 @@ void SelectionDAGBuilder::visitBr(const BranchInst &I) {
Opcode = Instruction::And;
else if (match(BOp, m_LogicalOr(m_Value(BOp0), m_Value(BOp1))))
Opcode = Instruction::Or;

if (Opcode &&
!(match(BOp0, m_ExtractElt(m_Value(Vec), m_Value())) &&
match(BOp1, m_ExtractElt(m_Specific(Vec), m_Value()))) &&
Expand Down
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