[Hexagon][Disassembler] Set CommentStream of Disassembler

[quic-areg]

Sets CommentStream after assert added in #125962.

[llvmbot]

@llvm/pr-subscribers-backend-hexagon

Author: None (quic-areg)

Changes

Sets CommentStream after assert added in #125962.

---

Full diff: https://github.com/llvm/llvm-project/pull/126766.diff

1 Files Affected:

• (modified) llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp (+4-2)

diff --git a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
index 4a80ca81c672b..98b711f6b014b 100644
--- a/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
+++ b/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
@@ -172,7 +172,9 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeHexagonDisassembler() {
 DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
                                                  ArrayRef<uint8_t> Bytes,
                                                  uint64_t Address,
-                                                 raw_ostream &cs) const {
+                                                 raw_ostream &CS) const {
+  CommentStream = &CS;
+
   DecodeStatus Result = DecodeStatus::Success;
   bool Complete = false;
   Size = 0;
@@ -184,7 +186,7 @@ DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
     if (Bytes.size() < HEXAGON_INSTR_SIZE)
       return MCDisassembler::Fail;
     MCInst *Inst = getContext().createMCInst();
-    Result = getSingleInstruction(*Inst, MI, Bytes, Address, cs, Complete);
+    Result = getSingleInstruction(*Inst, MI, Bytes, Address, CS, Complete);
     MI.addOperand(MCOperand::createInst(Inst));
     Size += HEXAGON_INSTR_SIZE;
     Bytes = Bytes.slice(HEXAGON_INSTR_SIZE);