Skip to content

AMDGPU: Implement getRequiredProperties for SIFoldOperands #127522

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 1 commit into from
Feb 18, 2025
Merged

AMDGPU: Implement getRequiredProperties for SIFoldOperands #127522

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
5 changes: 5 additions & 0 deletions llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -166,6 +166,11 @@ class SIFoldOperandsLegacy : public MachineFunctionPass {
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}

MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
};

} // End anonymous namespace.
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/AMDGPU/SIFoldOperands.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,11 @@ class SIFoldOperandsPass : public PassInfoMixin<SIFoldOperandsPass> {
SIFoldOperandsPass() = default;
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);

MachineFunctionProperties getRequiredProperties() const {
Copy link
Contributor

@optimisan optimisan Feb 18, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

Also requires the MFPropsModifier object in the ::run method.

Copy link
Contributor Author

@arsenm arsenm Feb 19, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I added this but I still don't get the error

Copy link
Contributor Author

@arsenm arsenm Feb 19, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

It doesn't seem to work, can you pick up #127752

return MachineFunctionProperties().set(
MachineFunctionProperties::Property::IsSSA);
}
};
} // namespace llvm

Expand Down
41 changes: 21 additions & 20 deletions llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -96,8 +96,8 @@ body: |
%12:vgpr_32 = V_AND_B32_e64 %8, %8, implicit $exec
FLAT_STORE_DWORD %19, %12, 0, 0, implicit $exec, implicit $flat_scr

%13:vgpr_32 = V_AND_B32_e64 %16, %16, implicit $exec
FLAT_STORE_DWORD %19, %13, 0, 0, implicit $exec, implicit $flat_scr
%21:vgpr_32 = V_AND_B32_e64 %16, %16, implicit $exec
FLAT_STORE_DWORD %19, %21, 0, 0, implicit $exec, implicit $flat_scr

S_ENDPGM 0

Expand Down Expand Up @@ -191,6 +191,7 @@ body: |

name: v_fold_ashr_imm_regimm_32
tracksRegLiveness: true
isSSA: true
liveins:
- { reg: '$sgpr0_sgpr1', virtual-reg: '%0' }
- { reg: '$vgpr0', virtual-reg: '%2' }
Expand Down Expand Up @@ -232,8 +233,8 @@ body: |
%14:vgpr_32 = V_ASHR_I32_e64 7, %29, implicit $exec
FLAT_STORE_DWORD %20, %14, 0, 0, implicit $exec, implicit $flat_scr

%15:vgpr_32 = V_ASHR_I32_e64 %27, %24, implicit $exec
FLAT_STORE_DWORD %20, %15, 0, 0, implicit $exec, implicit $flat_scr
%33:vgpr_32 = V_ASHR_I32_e64 %27, %24, implicit $exec
FLAT_STORE_DWORD %20, %33, 0, 0, implicit $exec, implicit $flat_scr

%22:vgpr_32 = V_ASHR_I32_e64 %6, 4, implicit $exec
FLAT_STORE_DWORD %20, %22, 0, 0, implicit $exec, implicit $flat_scr
Expand Down Expand Up @@ -356,8 +357,8 @@ body: |
%14:vgpr_32 = V_LSHR_B32_e64 7, %29, implicit $exec
FLAT_STORE_DWORD %20, %14, 0, 0, implicit $exec, implicit $flat_scr

%15:vgpr_32 = V_LSHR_B32_e64 %27, %24, implicit $exec
FLAT_STORE_DWORD %20, %15, 0, 0, implicit $exec, implicit $flat_scr
%33:vgpr_32 = V_LSHR_B32_e64 %27, %24, implicit $exec
FLAT_STORE_DWORD %20, %33, 0, 0, implicit $exec, implicit $flat_scr

%22:vgpr_32 = V_LSHR_B32_e64 %6, 4, implicit $exec
FLAT_STORE_DWORD %20, %22, 0, 0, implicit $exec, implicit $flat_scr
Expand Down Expand Up @@ -497,8 +498,8 @@ body: |
# GCN: %17:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %17,

# GCN: %3:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %3,
# GCN: %18:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %18,

name: v_fold_or_imm_regimm_32
alignment: 0
Expand Down Expand Up @@ -536,8 +537,8 @@ body: |
FLAT_STORE_DWORD %19, %11, 0, 0, implicit $exec, implicit $flat_scr
%12:vgpr_32 = V_OR_B32_e64 %8, %8, implicit $exec
FLAT_STORE_DWORD %19, %12, 0, 0, implicit $exec, implicit $flat_scr
%13:vgpr_32 = V_OR_B32_e64 %16, %16, implicit $exec
FLAT_STORE_DWORD %19, %13, 0, 0, implicit $exec, implicit $flat_scr
%21:vgpr_32 = V_OR_B32_e64 %16, %16, implicit $exec
FLAT_STORE_DWORD %19, %21, 0, 0, implicit $exec, implicit $flat_scr
S_ENDPGM 0

...
Expand Down Expand Up @@ -689,24 +690,24 @@ body: |
# GCN: %19:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %19,

# GCN: %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %3,

# GCN: %20:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
# GCN: %20:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %20,

# GCN: %21:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
# GCN: %21:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %21,

# GCN: %22:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
# GCN: %22:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %22,

# GCN: %23:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
# GCN: %23:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %23,

# GCN: %24:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
# GCN: %24:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %24,

# GCN: %25:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
# GCN: FLAT_STORE_DWORD %10, %25,

name: v_fold_shl_imm_regimm_32
alignment: 0
exposesReturnsTwice: false
Expand Down Expand Up @@ -745,8 +746,8 @@ body: |
FLAT_STORE_DWORD %20, %13, 0, 0, implicit $exec, implicit $flat_scr
%14:vgpr_32 = V_LSHL_B32_e64 12, %7, implicit $exec
FLAT_STORE_DWORD %20, %14, 0, 0, implicit $exec, implicit $flat_scr
%15:vgpr_32 = V_LSHL_B32_e64 12, %24, implicit $exec
FLAT_STORE_DWORD %20, %15, 0, 0, implicit $exec, implicit $flat_scr
%30:vgpr_32 = V_LSHL_B32_e64 12, %24, implicit $exec
FLAT_STORE_DWORD %20, %30, 0, 0, implicit $exec, implicit $flat_scr
%22:vgpr_32 = V_LSHL_B32_e64 %6, 12, implicit $exec
FLAT_STORE_DWORD %20, %22, 0, 0, implicit $exec, implicit $flat_scr
%23:vgpr_32 = V_LSHL_B32_e64 %6, 32, implicit $exec
Expand Down