Skip to content

[AMDGPU][MC] Disassembler warning for v_cmpx instructions #127925

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 3 commits into from
Feb 27, 2025
+1,126 −1
Merged

[AMDGPU][MC] Disassembler warning for v_cmpx instructions #127925

Show file tree
Hide file tree
Changes from 1 commit
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
897cc8f
[AMDGPU][MC] Disassembler warning for v_cmpx instructions
jwanggit86 Feb 20, 2025
76e4eb6
(1) Removed target generation check (2) Added comment.
jwanggit86 Feb 22, 2025
f7988dc
Tests for gfx11 and gfx12.
jwanggit86 Feb 26, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 11 additions & 1 deletion llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -663,6 +663,8 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
return MCDisassembler::Fail;
} while (false);

DecodeStatus Status = MCDisassembler::Success;

if (MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::DPP) {
if (isMacDPP(MI))
convertMacDPPInst(MI);
Expand Down Expand Up @@ -801,8 +803,16 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
if (ImmLitIdx != -1 && !IsSOPK)
convertFMAanyK(MI, ImmLitIdx);

if (isGFX10Plus() &&
Copy link
Contributor

@arsenm arsenm Feb 20, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

As always, I despise generation checks. Can you comment this, or put it in some kind of named predicate function

Copy link
Contributor Author

@jwanggit86 jwanggit86 Feb 22, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

This particular generation check may not be necessary. It seems that pre-gfx10 the VOPC instructions in question are not encoded as VOP3.

This check is removed in the latest commit.

(MCII->get(MI.getOpcode()).TSFlags & SIInstrFlags::VOP3) &&
MCII->get(MI.getOpcode()).hasImplicitDefOfPhysReg(AMDGPU::EXEC)) {
auto ExecEncoding = MRI.getEncodingValue(AMDGPU::EXEC_LO);
if (Bytes_[0] != ExecEncoding)
Status = MCDisassembler::SoftFail;
}

Size = MaxInstBytesNum - Bytes.size();
return MCDisassembler::Success;
return Status;
}

void AMDGPUDisassembler::convertEXPInst(MCInst &MI) const {
Expand Down
Loading