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[LLVM][SVE] Add isel for bfloat based constant splats. #129550

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merged 2 commits into from
Mar 4, 2025
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[LLVM][SVE] Add isel for bfloat based constant splats. #129550

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05bf293
Add bfloat imm tests
paulwalker-arm Mar 3, 2025
4c9da4f
[LLVM][SVE] Add isel for bfloat based constant splats.
paulwalker-arm Mar 3, 2025
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7 changes: 7 additions & 0 deletions llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -931,6 +931,13 @@ let Predicates = [HasSVE_or_SME] in {
(FDUP_ZI_S fpimm32:$imm8)>;
def : Pat<(nxv2f64 (splat_vector fpimm64:$imm8)),
(FDUP_ZI_D fpimm64:$imm8)>;
// Some half precision immediates alias with bfloat (e.g. f16(1.875) == bf16(1.0)).
def : Pat<(nxv8bf16 (splat_vector fpimmbf16:$imm8)),
(FDUP_ZI_H (fpimm16XForm bf16:$imm8))>;
def : Pat<(nxv4bf16 (splat_vector fpimmbf16:$imm8)),
(FDUP_ZI_H (fpimm16XForm bf16:$imm8))>;
def : Pat<(nxv2bf16 (splat_vector fpimmbf16:$imm8)),
(FDUP_ZI_H (fpimm16XForm bf16:$imm8))>;
}

// Select elements from either vector (predicated)
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31 changes: 29 additions & 2 deletions llvm/test/CodeGen/AArch64/sve-vector-splat.ll
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Expand Up @@ -482,6 +482,33 @@ define <vscale x 2 x double> @splat_nxv2f64_imm() {
ret <vscale x 2 x double> splat(double 1.0)
}

; NOTE: f16(1.875) == bf16(1.0)
define <vscale x 8 x bfloat> @splat_nxv8bf16_imm() {
; CHECK-LABEL: splat_nxv8bf16_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: fmov z0.h, #1.87500000
; CHECK-NEXT: ret
ret <vscale x 8 x bfloat> splat(bfloat 1.0)
}

; NOTE: f16(-1.875) == bf16(-1.0)
define <vscale x 4 x bfloat> @splat_nxv4bf16_imm() {
; CHECK-LABEL: splat_nxv4bf16_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: fmov z0.h, #-1.87500000
; CHECK-NEXT: ret
ret <vscale x 4 x bfloat> splat(bfloat -1.0)
}

; NOTE: f16(1.875) == bf16(1.0)
define <vscale x 2 x bfloat> @splat_nxv2bf16_imm() {
; CHECK-LABEL: splat_nxv2bf16_imm:
; CHECK: // %bb.0:
; CHECK-NEXT: fmov z0.h, #1.87500000
; CHECK-NEXT: ret
ret <vscale x 2 x bfloat> splat(bfloat 1.0)
}

define <vscale x 4 x i32> @splat_nxv4i32_fold(<vscale x 4 x i32> %x) {
; CHECK-LABEL: splat_nxv4i32_fold:
; CHECK: // %bb.0:
Expand Down Expand Up @@ -554,8 +581,8 @@ define <vscale x 2 x double> @splat_nxv2f64_imm_out_of_range() {
; CHECK-LABEL: splat_nxv2f64_imm_out_of_range:
; CHECK: // %bb.0:
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: adrp x8, .LCPI57_0
; CHECK-NEXT: add x8, x8, :lo12:.LCPI57_0
; CHECK-NEXT: adrp x8, .LCPI60_0
; CHECK-NEXT: add x8, x8, :lo12:.LCPI60_0
; CHECK-NEXT: ld1rd { z0.d }, p0/z, [x8]
; CHECK-NEXT: ret
ret <vscale x 2 x double> splat(double 3.33)
Expand Down