[RISCV] Improve Disassembler test xqci-invalid.txt #130039
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Some test lines were added in llvm#129504 for Qualcomm uC Xqcibm extension. This patch improves those test lines. Change-Id: I6d6fb7c7d13b3c516c52adaba84fb094bae92901
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@llvm/pr-subscribers-mc Author: quic_hchandel (hchandel) ChangesSome test lines were added in #129504 for Qualcomm uC Xqcibm extension. This patch improves those test lines. Full diff: https://github.com/llvm/llvm-project/pull/130039.diff 1 Files Affected:
diff --git a/llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt b/llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
index da1a630fd9c7e..46e6f34be2385 100644
--- a/llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
+++ b/llvm/test/MC/Disassembler/RISCV/xqci-invalid.txt
@@ -1,15 +1,19 @@
-# RUN: not llvm-mc -disassemble -triple=riscv32 -mattr=+experimental-xqciac %s | FileCheck %s
+# RUN: not llvm-mc -disassemble -triple=riscv32 -mattr=+experimental-xqciac %s \
+# RUN: | FileCheck -check-prefixes=CHECK,CHECK-XQCIAC %s
# RUN: not llvm-mc -disassemble -triple=riscv32 -mattr=+experimental-xqcibm %s \
-# RUN: | FileCheck -check-prefixes=CHECK-XQCIBM %s
+# RUN: | FileCheck -check-prefixes=CHECK,CHECK-XQCIBM %s
[0x00,0x00]
# CHECK: unimp
[0x8b,0x30,0x31,0x46]
-# CHECK-NOT: qc.shladd x1, x2, x3, {{[0-9]+}}
+# CHECK-XQCIAC-NOT: qc.shladd ra, sp, gp, {{[0-9]+}}
[0x00,0x00]
# CHECK: unimp
[0x92,0x17]
-# CHECK-XQCIBM-NOT: qc.c.extu a5, 4
+# CHECK-XQCIBM-NOT: qc.c.extu a5, {{[0-9]+}}
+
+[0x00,0x00]
+# CHECK: unimp
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lenary
approved these changes
Mar 10, 2025
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Thanks for the updates, this should be a lot less brittle to future updates.
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Some test lines were added in #129504 for Qualcomm uC Xqcibm extension. This patch improves those test lines.