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@arsenm arsenm commented Mar 6, 2025

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arsenm commented Mar 6, 2025

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llvmbot commented Mar 6, 2025

@llvm/pr-subscribers-llvm-transforms
@llvm/pr-subscribers-backend-nvptx

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

Full diff: https://github.com/llvm/llvm-project/pull/130083.diff

13 Files Affected:

  • (modified) llvm/test/CodeGen/X86/pr41619.ll (+2-2)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll (+8-8)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll (+1-1)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll (+2-2)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll (+24-8)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll (+4-4)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll (+4-4)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll (+1-1)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll (+5-5)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll (+1-1)
  • (modified) llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll (+8-8)
  • (modified) llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll (+1-1)
  • (modified) llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll (+3-3)
diff --git a/llvm/test/CodeGen/X86/pr41619.ll b/llvm/test/CodeGen/X86/pr41619.ll
index 88dcd7798f0c3..a5d3b37be7733 100644
--- a/llvm/test/CodeGen/X86/pr41619.ll
+++ b/llvm/test/CodeGen/X86/pr41619.ll
@@ -21,8 +21,8 @@ bb:
   %tmp6 = extractelement <2 x double> %tmp4, i32 1
   %tmp7 = bitcast double %tmp6 to i64
   %tmp8 = trunc i64 %tmp7 to i32
-  store i32 %tmp8, ptr undef, align 4
-  store double %tmp5, ptr undef, align 16
+  store i32 %tmp8, ptr poison, align 4
+  store double %tmp5, ptr poison, align 16
   ret void
 }
 
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll
index 2cf05c332416e..5bdb171dc6fff 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll
@@ -3,49 +3,49 @@
 
 define amdgpu_kernel void @is_local_true(ptr addrspace(3) %lptr) {
 ; CHECK-LABEL: @is_local_true(
-; CHECK-NEXT:    store i32 1, ptr addrspace(1) undef
+; CHECK-NEXT:    store i32 1, ptr addrspace(1) poison
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(3) %lptr to ptr
   %is.shared = call i1 @llvm.amdgcn.is.shared(ptr %cast)
   %ext = zext i1 %is.shared to i32
-  store i32 %ext, ptr addrspace(1) undef
+  store i32 %ext, ptr addrspace(1) poison
   ret void
 }
 
 define amdgpu_kernel void @is_local_false(ptr addrspace(1) %gptr) {
 ; CHECK-LABEL: @is_local_false(
-; CHECK-NEXT:    store i32 0, ptr addrspace(1) undef
+; CHECK-NEXT:    store i32 0, ptr addrspace(1) poison
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(1) %gptr to ptr
   %is.shared = call i1 @llvm.amdgcn.is.shared(ptr %cast)
   %ext = zext i1 %is.shared to i32
-  store i32 %ext, ptr addrspace(1) undef
+  store i32 %ext, ptr addrspace(1) poison
   ret void
 }
 
 define void @is_private_true(ptr addrspace(5) %lptr) {
 ; CHECK-LABEL: @is_private_true(
-; CHECK-NEXT:    store i32 1, ptr addrspace(1) undef
+; CHECK-NEXT:    store i32 1, ptr addrspace(1) poison
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(5) %lptr to ptr
   %is.private = call i1 @llvm.amdgcn.is.private(ptr %cast)
   %ext = zext i1 %is.private to i32
-  store i32 %ext, ptr addrspace(1) undef
+  store i32 %ext, ptr addrspace(1) poison
   ret void
 }
 
 define void @is_private_false(ptr addrspace(1) %gptr) {
 ; CHECK-LABEL: @is_private_false(
-; CHECK-NEXT:    store i32 0, ptr addrspace(1) undef
+; CHECK-NEXT:    store i32 0, ptr addrspace(1) poison
 ; CHECK-NEXT:    ret void
 ;
   %cast = addrspacecast ptr addrspace(1) %gptr to ptr
   %is.private = call i1 @llvm.amdgcn.is.private(ptr %cast)
   %ext = zext i1 %is.private to i32
-  store i32 %ext, ptr addrspace(1) undef
+  store i32 %ext, ptr addrspace(1) poison
   ret void
 }
 
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll
index ad0a61e66e0dc..b981a8eb541d8 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll
@@ -1,6 +1,6 @@
 ; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces -o - %s | FileCheck %s
 
-@c0 = addrspace(4) global ptr undef
+@c0 = addrspace(4) global ptr poison
 
 ; CHECK-LABEL: @generic_ptr_from_constant
 ; CHECK: addrspacecast ptr %p to ptr addrspace(1)
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
index f636aa24d87c3..e2c51f3db72f1 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
@@ -2,7 +2,7 @@
 
 ; check that the debug locations are correctly propagated
 
-@lds = internal unnamed_addr addrspace(3) global [648 x double] undef, align 8
+@lds = internal unnamed_addr addrspace(3) global [648 x double] poison, align 8
 
 ; CHECK-LABEL: @load_global_from_flat(
 ; CHECK-NEXT: %tmp0 = addrspacecast ptr %generic_scalar to ptr addrspace(1), !dbg ![[DEBUG_LOC_TMP0:[0-9]+]]
@@ -140,4 +140,4 @@ attributes #4 = { nounwind readnone speculatable }
 !42 = !DILocation(line: 22, column: 1, scope: !37)
 !43 = !DILocation(line: 23, column: 1, scope: !37)
 !44 = !DILocation(line: 24, column: 1, scope: !37)
-!45 = !DILocation(line: 25, column: 1, scope: !37)
\ No newline at end of file
+!45 = !DILocation(line: 25, column: 1, scope: !37)
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
index 0c8d7a26a5130..c36977255462d 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll
@@ -94,6 +94,14 @@ define i1 @icmp_mismatch_flat_group_private_cmp_undef(ptr addrspace(3) %group.pt
   ret i1 %cmp
 }
 
+; CHECK-LABEL: @icmp_mismatch_flat_group_private_cmp_poison(
+; CHECK: %cmp = icmp eq ptr addrspace(3) %group.ptr.0, poison
+define i1 @icmp_mismatch_flat_group_private_cmp_poison(ptr addrspace(3) %group.ptr.0) #0 {
+  %cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
+  %cmp = icmp eq ptr %cast0, addrspacecast (ptr addrspace(5) poison to ptr)
+  ret i1 %cmp
+}
+
 @lds0 = internal addrspace(3) global i32 0, align 4
 @global0 = internal addrspace(1) global i32 0, align 4
 
@@ -113,11 +121,11 @@ define i1 @icmp_mismatch_group_global_cmp_gv_gv(ptr addrspace(3) %group.ptr.0) #
   ret i1 %cmp
 }
 
-; CHECK-LABEL: @icmp_group_flat_cmp_undef(
-; CHECK: %cmp = icmp eq ptr addrspace(3) %group.ptr.0, undef
-define i1 @icmp_group_flat_cmp_undef(ptr addrspace(3) %group.ptr.0) #0 {
+; CHECK-LABEL: @icmp_group_flat_cmp_poison(
+; CHECK: %cmp = icmp eq ptr addrspace(3) %group.ptr.0, poison
+define i1 @icmp_group_flat_cmp_poison(ptr addrspace(3) %group.ptr.0) #0 {
   %cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
-  %cmp = icmp eq ptr %cast0, undef
+  %cmp = icmp eq ptr %cast0, poison
   ret i1 %cmp
 }
 
@@ -131,6 +139,14 @@ define i1 @icmp_mismatch_flat_group_private_cmp_null_swap(ptr addrspace(3) %grou
   ret i1 %cmp
 }
 
+; CHECK-LABEL: @icmp_group_flat_cmp_poison_swap(
+; CHECK: %cmp = icmp eq ptr addrspace(3) poison, %group.ptr.0
+define i1 @icmp_group_flat_cmp_poison_swap(ptr addrspace(3) %group.ptr.0) #0 {
+  %cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
+  %cmp = icmp eq ptr poison, %cast0
+  ret i1 %cmp
+}
+
 ; CHECK-LABEL: @icmp_group_flat_cmp_undef_swap(
 ; CHECK: %cmp = icmp eq ptr addrspace(3) undef, %group.ptr.0
 define i1 @icmp_group_flat_cmp_undef_swap(ptr addrspace(3) %group.ptr.0) #0 {
@@ -139,11 +155,11 @@ define i1 @icmp_group_flat_cmp_undef_swap(ptr addrspace(3) %group.ptr.0) #0 {
   ret i1 %cmp
 }
 
-; CHECK-LABEL: @icmp_mismatch_flat_group_private_cmp_undef_swap(
-; CHECK: %cmp = icmp eq ptr addrspace(3) undef, %group.ptr.0
-define i1 @icmp_mismatch_flat_group_private_cmp_undef_swap(ptr addrspace(3) %group.ptr.0) #0 {
+; CHECK-LABEL: @icmp_mismatch_flat_group_private_cmp_poison_swap(
+; CHECK: %cmp = icmp eq ptr addrspace(3) poison, %group.ptr.0
+define i1 @icmp_mismatch_flat_group_private_cmp_poison_swap(ptr addrspace(3) %group.ptr.0) #0 {
   %cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
-  %cmp = icmp eq ptr addrspacecast (ptr addrspace(5) undef to ptr), %cast0
+  %cmp = icmp eq ptr addrspacecast (ptr addrspace(5) poison to ptr), %cast0
   ret i1 %cmp
 }
 
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
index ecb3e34d1274b..a08110defc8b3 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll
@@ -193,14 +193,14 @@ define void @select_bug() #0 {
 ; CHECK-SAME: ) #[[ATTR0]] {
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ne ptr inttoptr (i64 4873 to ptr), null
 ; CHECK-NEXT:    [[SEL:%.*]] = select i1 [[CMP]], i64 73, i64 93
-; CHECK-NEXT:    [[ADD_PTR157:%.*]] = getelementptr inbounds i64, ptr undef, i64 [[SEL]]
-; CHECK-NEXT:    [[CMP169:%.*]] = icmp uge ptr undef, [[ADD_PTR157]]
+; CHECK-NEXT:    [[ADD_PTR157:%.*]] = getelementptr inbounds i64, ptr poison, i64 [[SEL]]
+; CHECK-NEXT:    [[CMP169:%.*]] = icmp uge ptr poison, [[ADD_PTR157]]
 ; CHECK-NEXT:    unreachable
 ;
   %cmp = icmp ne ptr inttoptr (i64 4873 to ptr), null
   %sel = select i1 %cmp, i64 73, i64 93
-  %add.ptr157 = getelementptr inbounds i64, ptr undef, i64 %sel
-  %cmp169 = icmp uge ptr undef, %add.ptr157
+  %add.ptr157 = getelementptr inbounds i64, ptr poison, i64 %sel
+  %cmp169 = icmp uge ptr poison, %add.ptr157
   unreachable
 }
 
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
index c2e83619a4584..c97f608ea70fe 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll
@@ -29,25 +29,25 @@ define void @addrspacecast_different_pointee_type(ptr addrspace(3) %ptr) {
 
 ; CHECK-LABEL: @addrspacecast_to_memory(
 ; CHECK: %gep0 = getelementptr i32, ptr addrspace(3) %ptr, i64 9
-; CHECK-NEXT: store volatile ptr addrspace(3) %gep0, ptr addrspace(1) undef
+; CHECK-NEXT: store volatile ptr addrspace(3) %gep0, ptr addrspace(1) poison
 ; CHECK-NEXT: ret void
 define void @addrspacecast_to_memory(ptr addrspace(3) %ptr) {
   %asc0 = addrspacecast ptr addrspace(3) %ptr to ptr
   %gep0 = getelementptr i32, ptr %asc0, i64 9
   %asc1 = addrspacecast ptr %gep0 to ptr addrspace(3)
-  store volatile ptr addrspace(3) %asc1, ptr addrspace(1) undef
+  store volatile ptr addrspace(3) %asc1, ptr addrspace(1) poison
   ret void
 }
 
 ; CHECK-LABEL: @multiuse_addrspacecast_gep_addrspacecast(
 ; CHECK: %asc0 = addrspacecast ptr addrspace(3) %ptr to ptr
-; CHECK-NEXT: store volatile ptr %asc0, ptr addrspace(1) undef
+; CHECK-NEXT: store volatile ptr %asc0, ptr addrspace(1) poison
 ; CHECK-NEXT: %gep0 = getelementptr i32, ptr addrspace(3) %ptr, i64 9
 ; CHECK-NEXT: store i32 8, ptr addrspace(3) %gep0, align 8
 ; CHECK-NEXT: ret void
 define void @multiuse_addrspacecast_gep_addrspacecast(ptr addrspace(3) %ptr) {
   %asc0 = addrspacecast ptr addrspace(3) %ptr to ptr
-  store volatile ptr %asc0, ptr addrspace(1) undef
+  store volatile ptr %asc0, ptr addrspace(1) poison
   %gep0 = getelementptr i32, ptr %asc0, i64 9
   %asc1 = addrspacecast ptr %gep0 to ptr addrspace(3)
   store i32 8, ptr addrspace(3) %asc1, align 8
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
index 8a9c81912cc93..53ded91ac311a 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll
@@ -4,7 +4,7 @@
 ; Test that pure GetElementPtr instructions not directly connected to
 ; a memory operation are inferred.
 
-@lds = internal unnamed_addr addrspace(3) global [648 x double] undef, align 8
+@lds = internal unnamed_addr addrspace(3) global [648 x double] poison, align 8
 
 define void @simplified_constexpr_gep_addrspacecast(i64 %idx0, i64 %idx1) {
 ; CHECK-LABEL: @simplified_constexpr_gep_addrspacecast(
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
index 4a7300b9e9302..70203a031f739 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll
@@ -35,24 +35,24 @@ define i32 @addrspacecast_insert_pos_assert() {
 define void @bitcast_insert_pos_assert_1() {
 ; CHECK-LABEL: @bitcast_insert_pos_assert_1(
 ; CHECK-NEXT:  bb.0:
-; CHECK-NEXT:    [[ASC0:%.*]] = addrspacecast ptr addrspace(5) undef to ptr
+; CHECK-NEXT:    [[ASC0:%.*]] = addrspacecast ptr addrspace(5) poison to ptr
 ; CHECK-NEXT:    [[PTI0:%.*]] = ptrtoint ptr [[ASC0]] to i64
 ; CHECK-NEXT:    br label [[BB_1:%.*]]
 ; CHECK:       bb.1:
-; CHECK-NEXT:    br i1 undef, label [[BB_2:%.*]], label [[BB_3:%.*]]
+; CHECK-NEXT:    br i1 poison, label [[BB_2:%.*]], label [[BB_3:%.*]]
 ; CHECK:       bb.2:
-; CHECK-NEXT:    [[LOAD0:%.*]] = load ptr, ptr addrspace(5) undef, align 8
+; CHECK-NEXT:    [[LOAD0:%.*]] = load ptr, ptr addrspace(5) poison, align 8
 ; CHECK-NEXT:    br label [[BB_3]]
 ; CHECK:       bb.3:
 ; CHECK-NEXT:    ret void
 ;
 bb.0:
-  %asc0 = addrspacecast ptr addrspace(5) undef to ptr
+  %asc0 = addrspacecast ptr addrspace(5) poison to ptr
   %pti0 = ptrtoint ptr %asc0 to i64
   br label %bb.1
 
 bb.1:
-  br i1 undef, label %bb.2, label %bb.3
+  br i1 poison, label %bb.2, label %bb.3
 
 bb.2:
   %pti1 = ptrtoint ptr %asc0 to i64
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
index d2b4b98cc80b8..5a2244b9796e8 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
@@ -125,7 +125,7 @@ entry:
   %tmp12 = icmp eq i32 %tmp9, 0
   %tmp13 = select i1 %tmp12, i32 32, i32 %tmp9
   %tmp14 = getelementptr inbounds i32, ptr %tmp4, i64 %tmp6
-  %tmp15 = insertelement <2 x i32> undef, i32 %tmp11, i32 0
+  %tmp15 = insertelement <2 x i32> poison, i32 %tmp11, i32 0
   %tmp16 = insertelement <2 x i32> %tmp15, i32 %tmp13, i32 1
   store <2 x i32> %tmp16, ptr %tmp14, align 4
   ret void
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
index ab4e1277b81fd..019ca8a8759dc 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll
@@ -74,22 +74,22 @@ define amdgpu_kernel void @store_select_group_flat_null_swap(i1 %c, ptr addrspac
   ret void
 }
 
-; CHECK-LABEL: @store_select_group_flat_undef(
-; CHECK: %select = select i1 %c, ptr addrspace(3) %group.ptr.0, ptr addrspace(3) undef
+; CHECK-LABEL: @store_select_group_flat_poison(
+; CHECK: %select = select i1 %c, ptr addrspace(3) %group.ptr.0, ptr addrspace(3) poison
 ; CHECK: store i32 -1, ptr addrspace(3) %select
-define amdgpu_kernel void @store_select_group_flat_undef(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
+define amdgpu_kernel void @store_select_group_flat_poison(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
   %cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
-  %select = select i1 %c, ptr %cast0, ptr undef
+  %select = select i1 %c, ptr %cast0, ptr poison
   store i32 -1, ptr %select
   ret void
 }
 
-; CHECK-LABEL: @store_select_group_flat_undef_swap(
-; CHECK: %select = select i1 %c, ptr addrspace(3) undef, ptr addrspace(3) %group.ptr.0
+; CHECK-LABEL: @store_select_group_flat_poison_swap(
+; CHECK: %select = select i1 %c, ptr addrspace(3) poison, ptr addrspace(3) %group.ptr.0
 ; CHECK: store i32 -1, ptr addrspace(3) %select
-define amdgpu_kernel void @store_select_group_flat_undef_swap(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
+define amdgpu_kernel void @store_select_group_flat_poison_swap(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
   %cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
-  %select = select i1 %c, ptr undef, ptr %cast0
+  %select = select i1 %c, ptr poison, ptr %cast0
   store i32 -1, ptr %select
   ret void
 }
diff --git a/llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll b/llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll
index 5ead48aac18e1..d12db769d8192 100644
--- a/llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll
@@ -5,7 +5,7 @@ target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
 
 %struct.bar = type { float, ptr }
 
-@var1 = local_unnamed_addr addrspace(3) externally_initialized global %struct.bar undef, align 8
+@var1 = local_unnamed_addr addrspace(3) externally_initialized global %struct.bar poison, align 8
 
 define void @bug31948(float %a, ptr nocapture readnone %x, ptr nocapture readnone %y) local_unnamed_addr #0 {
 ; CHECK-LABEL: define void @bug31948(
diff --git a/llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll b/llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll
index d2f325d00bfb6..7c4d897afae23 100644
--- a/llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll
@@ -13,7 +13,7 @@ define void @foo() local_unnamed_addr #0 {
 ; CHECK-NEXT:    [[X0:%.*]] = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #[[ATTR2:[0-9]+]]
 ; CHECK-NEXT:    [[IDXPROM_I:%.*]] = zext i32 [[X0]] to i64
 ; CHECK-NEXT:    [[ARRAYIDX_I:%.*]] = getelementptr [[STRUCT_S:%.*]], ptr addrspacecast (ptr addrspace(3) @g1 to ptr), i64 0, i32 0, i64 [[IDXPROM_I]]
-; CHECK-NEXT:    tail call void @f1(ptr [[ARRAYIDX_I]], i32 undef) #[[ATTR0:[0-9]+]]
+; CHECK-NEXT:    tail call void @f1(ptr [[ARRAYIDX_I]], i32 poison) #[[ATTR0:[0-9]+]]
 ; CHECK-NEXT:    [[X1:%.*]] = load i32, ptr addrspace(3) @g1, align 4
 ; CHECK-NEXT:    [[L_SROA_0_0_INSERT_EXT_I:%.*]] = zext i32 [[X1]] to i64
 ; CHECK-NEXT:    tail call void @f2(ptr null, i64 [[L_SROA_0_0_INSERT_EXT_I]]) #[[ATTR0]]
@@ -23,7 +23,7 @@ entry:
   %x0 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2
   %idxprom.i = zext i32 %x0 to i64
   %arrayidx.i = getelementptr %struct.S, ptr addrspacecast (ptr addrspace(3) @g1 to ptr), i64 0, i32 0, i64 %idxprom.i
-  tail call void @f1(ptr %arrayidx.i, i32 undef) #0
+  tail call void @f1(ptr %arrayidx.i, i32 poison) #0
   %x1 = load i32, ptr addrspacecast (ptr addrspace(3) @g1 to ptr), align 4
   %L.sroa.0.0.insert.ext.i = zext i32 %x1 to i64
   tail call void @f2(ptr null, i64 %L.sroa.0.0.insert.ext.i) #0
@@ -36,7 +36,7 @@ declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
 
 ; Make sure we can clone GEP which uses complex constant expressions as indices.
 ; https://bugs.llvm.org/show_bug.cgi?id=51099
-@g2 = internal addrspace(3) global [128 x i8] undef, align 1
+@g2 = internal addrspace(3) global [128 x i8] poison, align 1
 
 define float @complex_ce(ptr nocapture readnone %a, ptr nocapture readnone %b, ptr nocapture readnone %c) local_unnamed_addr #0 {
 ; CHECK-LABEL: @complex_ce(

@arsenm arsenm merged commit 15ba2ce into main Mar 6, 2025
18 checks passed
@arsenm arsenm deleted the users/arsenm/infer-address-spaces/replace-undef-with-poison-in-tests branch March 6, 2025 16:20
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