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[lldb] Add more ARM checks in TestLldbGdbServer.py #130277

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Merged
merged 1 commit into from
Mar 10, 2025
Merged

[lldb] Add more ARM checks in TestLldbGdbServer.py #130277

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7 changes: 7 additions & 0 deletions lldb/packages/Python/lldbsuite/test/lldbtest.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1344,6 +1344,13 @@ def isAArch64(self):
arch = self.getArchitecture().lower()
return arch in ["aarch64", "arm64", "arm64e"]

def isARM(self):
"""Returns true if the architecture is ARM, meaning 32-bit ARM. Which could
be M profile, A profile Armv7-a, or the AArch32 mode of Armv8-a."""
return not self.isAArch64() and (
self.getArchitecture().lower().startswith("arm")
)

def isAArch64SVE(self):
return self.isAArch64() and "sve" in self.getCPUInfo()

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8 changes: 4 additions & 4 deletions lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
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Expand Up @@ -199,12 +199,12 @@ def test_qRegisterInfo_contains_required_generics_debugserver(self):
if not self.isRISCV():
self.assertIn("flags", generic_regs)

if self.isRISCV():
# Special RISC-V register for a return address
if self.isRISCV() or self.isAArch64() or self.isARM():
# Specific register for a return address
self.assertIn("ra", generic_regs)

# RISC-V's function arguments registers
for i in range(1, 9):
# Function arguments registers
for i in range(1, 5 if self.isARM() else 9):
self.assertIn(f"arg{i}", generic_regs)

def test_qRegisterInfo_contains_at_least_one_register_set(self):
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