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[AMDGPU] Change placeholder from undef to poison #130853

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Merged
merged 1 commit into from
Mar 12, 2025
Merged

[AMDGPU] Change placeholder from undef to poison #130853

merged 1 commit into from
Mar 12, 2025

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@pedroclobo
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@pedroclobo pedroclobo commented Mar 11, 2025

Call insertelement with poison instead of undef.

@pedroclobo
[AMDGPU] Change placeholder from undef to poison
c066ba6 
Call `insertelement` with `poison` instead of `undef`.
@llvmbot
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llvmbot commented Mar 11, 2025

@llvm/pr-subscribers-backend-amdgpu

Author: Pedro Lobo (pedroclobo)

Changes

Call insertelement with poison instead of undef.

Patch is 21.34 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/130853.diff

2 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp (+1-1)
  • (modified) llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll (+36-36)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
index 179d8aa46f802..639089c75a33e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
@@ -256,7 +256,7 @@ bool optimizeSection(ArrayRef<SmallVector<IntrinsicInst *, 4>> MergeableInsts) {
         VecOp = B.CreateExtractElement(NewCalls[0], Idx->getValue().urem(4));
         LLVM_DEBUG(dbgs() << "Add: " << *VecOp << "\n");
       } else {
-        VecOp = UndefValue::get(II->getType());
+        VecOp = PoisonValue::get(II->getType());
         for (unsigned I = 0; I < NumElts; ++I) {
           VecOp = B.CreateInsertElement(
               VecOp,
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
index 4df6fcd584ff6..33a49fd22f13b 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.load.2dmsaa.ll
@@ -455,19 +455,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2dmsaa_v4v2f32_dmask3(<8 x i32> inreg %
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 1, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 2, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -511,19 +511,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2dmsaa_v4v2f32_dmask5(<8 x i32> inreg %
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 1, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 4, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -567,19 +567,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2dmsaa_v4v2f32_dmask6(<8 x i32> inreg %
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 2, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 4, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -623,19 +623,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2dmsaa_v4v2f32_dmask9(<8 x i32> inreg %
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 1, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 8, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -679,19 +679,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2dmsaa_v4v2f32_dmask10(<8 x i32> inreg
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 2, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 8, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -735,19 +735,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2dmsaa_v4v2f32_dmask12(<8 x i32> inreg
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 4, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 8, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -859,19 +859,19 @@ define amdgpu_ps [4 x <2 x float>] @load_2darraymsaa_v4v2f32_dmask3(<8 x i32> in
 ; MSAA-NEXT:    [[TMP0:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32.v8i32(i32 1, i32 [[S]], i32 [[T]], i32 [[SLICE]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2darraymsaa.v4f32.i32.v8i32(i32 2, i32 [[S]], i32 [[T]], i32 [[SLICE]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> undef, float [[TMP2]], i64 0
+; MSAA-NEXT:    [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i64 0
 ; MSAA-NEXT:    [[TMP4:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <2 x float> [[TMP3]], float [[TMP4]], i64 1
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> undef, float [[TMP5]], i64 0
+; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <2 x float> poison, float [[TMP5]], i64 0
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <2 x float> [[TMP6]], float [[TMP7]], i64 1
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <2 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <2 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> undef, float [[TMP11]], i64 0
+; MSAA-NEXT:    [[TMP12:%.*]] = insertelement <2 x float> poison, float [[TMP11]], i64 0
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[I3:%.*]] = insertelement <2 x float> [[TMP12]], float [[TMP13]], i64 1
 ; MSAA-NEXT:    [[I4:%.*]] = insertvalue [4 x <2 x float>] undef, <2 x float> [[I]], 0
@@ -918,25 +918,25 @@ define amdgpu_ps [4 x <3 x float>] @load_2dmsaa_v4v3f32_dmask7(<8 x i32> inreg %
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 2, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 4, i32 [[S]], i32 [[T]], i32 0, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP3:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP4:%.*]] = insertelement <3 x float> undef, float [[TMP3]], i64 0
+; MSAA-NEXT:    [[TMP4:%.*]] = insertelement <3 x float> poison, float [[TMP3]], i64 0
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <3 x float> [[TMP4]], float [[TMP5]], i64 1
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP2]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <3 x float> [[TMP6]], float [[TMP7]], i64 2
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <3 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <3 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x float> [[TMP1]], i64 1
 ; MSAA-NEXT:    [[TMP11:%.*]] = insertelement <3 x float> [[TMP9]], float [[TMP10]], i64 1
 ; MSAA-NEXT:    [[TMP12:%.*]] = extractelement <4 x float> [[TMP2]], i64 1
 ; MSAA-NEXT:    [[I1:%.*]] = insertelement <3 x float> [[TMP11]], float [[TMP12]], i64 2
 ; MSAA-NEXT:    [[TMP13:%.*]] = extractelement <4 x float> [[TMP0]], i64 2
-; MSAA-NEXT:    [[TMP14:%.*]] = insertelement <3 x float> undef, float [[TMP13]], i64 0
+; MSAA-NEXT:    [[TMP14:%.*]] = insertelement <3 x float> poison, float [[TMP13]], i64 0
 ; MSAA-NEXT:    [[TMP15:%.*]] = extractelement <4 x float> [[TMP1]], i64 2
 ; MSAA-NEXT:    [[TMP16:%.*]] = insertelement <3 x float> [[TMP14]], float [[TMP15]], i64 1
 ; MSAA-NEXT:    [[TMP17:%.*]] = extractelement <4 x float> [[TMP2]], i64 2
 ; MSAA-NEXT:    [[I2:%.*]] = insertelement <3 x float> [[TMP16]], float [[TMP17]], i64 2
 ; MSAA-NEXT:    [[TMP18:%.*]] = extractelement <4 x float> [[TMP0]], i64 3
-; MSAA-NEXT:    [[TMP19:%.*]] = insertelement <3 x float> undef, float [[TMP18]], i64 0
+; MSAA-NEXT:    [[TMP19:%.*]] = insertelement <3 x float> poison, float [[TMP18]], i64 0
 ; MSAA-NEXT:    [[TMP20:%.*]] = extractelement <4 x float> [[TMP1]], i64 3
 ; MSAA-NEXT:    [[TMP21:%.*]] = insertelement <3 x float> [[TMP19]], float [[TMP20]], i64 1
 ; MSAA-NEXT:    [[TMP22:%.*]] = extractelement <4 x float> [[TMP2]], i64 3
@@ -985,25 +985,25 @@ define amdgpu_ps [4 x <3 x float>] @load_2dmsaa_v4v3f32_dmask7_group1(<8 x i32>
 ; MSAA-NEXT:    [[TMP1:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 2, i32 [[S]], i32 [[T]], i32 4, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP2:%.*]] = call <4 x float> @llvm.amdgcn.image.msaa.load.2dmsaa.v4f32.i32.v8i32(i32 4, i32 [[S]], i32 [[T]], i32 4, <8 x i32> [[RSRC]], i32 0, i32 0)
 ; MSAA-NEXT:    [[TMP3:%.*]] = extractelement <4 x float> [[TMP0]], i64 0
-; MSAA-NEXT:    [[TMP4:%.*]] = insertelement <3 x float> undef, float [[TMP3]], i64 0
+; MSAA-NEXT:    [[TMP4:%.*]] = insertelement <3 x float> poison, float [[TMP3]], i64 0
 ; MSAA-NEXT:    [[TMP5:%.*]] = extractelement <4 x float> [[TMP1]], i64 0
 ; MSAA-NEXT:    [[TMP6:%.*]] = insertelement <3 x float> [[TMP4]], float [[TMP5]], i64 1
 ; MSAA-NEXT:    [[TMP7:%.*]] = extractelement <4 x float> [[TMP2]], i64 0
 ; MSAA-NEXT:    [[I:%.*]] = insertelement <3 x float> [[TMP6]], float [[TMP7]], i64 2
 ; MSAA-NEXT:    [[TMP8:%.*]] = extractelement <4 x float> [[TMP0]], i64 1
-; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <3 x float> undef, float [[TMP8]], i64 0
+; MSAA-NEXT:    [[TMP9:%.*]] = insertelement <3 x float> poison, float [[TMP8]], i64 0
 ; MSAA-NEXT:    [[TMP10:%.*]] = extractelement <4 x...
[truncated]

@pedroclobo pedroclobo merged commit 15136f1 into llvm:main Mar 12, 2025
13 checks passed
@pedroclobo pedroclobo deleted the amd-poison branch March 12, 2025 12:52
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