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3 changes: 2 additions & 1 deletion llvm/lib/Target/X86/X86InstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -5691,7 +5691,8 @@ bool X86InstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg,
// Replace non-NF with NF instructions.
for (auto &Inst : InstsToUpdate) {
Inst.first->setDesc(get(Inst.second));
Inst.first->removeOperand(Inst.first->getNumOperands() - 1);
Inst.first->removeOperand(
Inst.first->findRegisterDefOperandIdx(X86::EFLAGS, /*TRI=*/nullptr));
}

// Make sure Sub instruction defines EFLAGS and mark the def live.
Expand Down
52 changes: 50 additions & 2 deletions llvm/test/CodeGen/X86/apx/ctest.ll
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ccmp -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ccmp,+ndd -verify-machineinstrs | FileCheck %s --check-prefix=NDD
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ccmp,+nf -verify-machineinstrs | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ccmp,+ndd,+nf -verify-machineinstrs | FileCheck %s --check-prefix=NDD

define void @ctest8rr_zf(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: ctest8rr_zf:
Expand Down Expand Up @@ -936,4 +936,52 @@ if.end: ; preds = %entry, %if.then
ret void
}

define void @cmp_srem(ptr %p, i32 %a, ptr %b) {
; CHECK-LABEL: cmp_srem:
; CHECK: # %bb.0: # %bb
; CHECK-NEXT: movq %rdx, %rcx
; CHECK-NEXT: movl %esi, %eax
; CHECK-NEXT: subl $1, %eax
; CHECK-NEXT: movl (%rdi), %edi
; CHECK-NEXT: cltd
; CHECK-NEXT: {nf} idivl %edi
; CHECK-NEXT: ctestnel {dfv=} %edx, %edx
; CHECK-NEXT: sete %al
; CHECK-NEXT: cmpl $1, %esi
; CHECK-NEXT: ccmpael {dfv=zf} $1, %edi
; CHECK-NEXT: sete %dl
; CHECK-NEXT: orb %al, %dl
; CHECK-NEXT: movb %dl, (%rcx)
; CHECK-NEXT: retq
;
; NDD-LABEL: cmp_srem:
; NDD: # %bb.0: # %bb
; NDD-NEXT: movq %rdx, %rcx
; NDD-NEXT: subl $1, %esi, %eax
; NDD-NEXT: movl (%rdi), %edi
; NDD-NEXT: cltd
; NDD-NEXT: {nf} idivl %edi
; NDD-NEXT: ctestnel {dfv=} %edx, %edx
; NDD-NEXT: sete %al
; NDD-NEXT: cmpl $1, %esi
; NDD-NEXT: ccmpael {dfv=zf} $1, %edi
; NDD-NEXT: sete %dl
; NDD-NEXT: orb %dl, %al
; NDD-NEXT: movb %al, (%rcx)
; NDD-NEXT: retq
bb:
%i = icmp eq i32 %a, 0
%i2 = load i32, ptr %p, align 4
%i3 = icmp eq i32 %i2, 1
%i4 = or i1 %i, %i3
%i5 = add i32 %a, -1
%i6 = srem i32 %i5, %i2
%i7 = icmp eq i32 %i6, 0
%i8 = icmp ne i32 %a, 1
%i9 = and i1 %i8, %i7
%i10 = or i1 %i4, %i9
store i1 %i10, ptr %b, align 1
ret void
}

declare dso_local void @foo(...)