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[RISCV] Fix incorrect slide offset when using vnsrl to de-interleave #132123

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Merged
merged 3 commits into from
Mar 20, 2025
+21 −6
Merged

[RISCV] Fix incorrect slide offset when using vnsrl to de-interleave #132123

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d298e8c
[RISCV] Fix incorrect slide offset when using vnsrl to de-interleave
mshockwave Mar 19, 2025
1400fa9
fixup! Use INSERT_SUBVECTOR intead of using many CONCAT_VECTORS
mshockwave Mar 20, 2025
d1146cf
fixup! Address review comments
mshockwave Mar 20, 2025
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15 changes: 6 additions & 9 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -5555,15 +5555,12 @@ static SDValue lowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
SDValue Hi =
getDeinterleaveShiftAndTrunc(DL, SubVT, V2, Factor, Index, DAG);

MVT NewVT = SubVT.getDoubleNumVectorElementsVT();
SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, DL, NewVT, Lo, Hi);
for (unsigned F = Factor; F > 2; F >>= 1) {
SDValue Undef = DAG.getUNDEF(NewVT);
NewVT = NewVT.getDoubleNumVectorElementsVT();
Concat = DAG.getNode(ISD::CONCAT_VECTORS, DL, NewVT, Concat, Undef);
}

return Concat;
SDValue Vec = DAG.getUNDEF(VT);
Vec = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, VT, Vec, Lo,
DAG.getVectorIdxConstant(0, DL));
return DAG.getNode(
ISD::INSERT_SUBVECTOR, DL, VT, Vec, Hi,
DAG.getVectorIdxConstant(SubVT.getVectorMinNumElements(), DL));
}
}
}
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-deinterleave.ll
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Expand Up @@ -378,7 +378,7 @@ define void @deinterleave4_0_i8_two_source(ptr %in0, ptr %in1, ptr %out) {
; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
; CHECK-NEXT: vnsrl.wi v8, v8, 0
; CHECK-NEXT: vnsrl.wi v9, v9, 0
; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
; CHECK-NEXT: vsetivli zero, 4, e8, mf2, tu, ma
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@topperc topperc Mar 20, 2025

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Would it be better to CONCAT_VECTORS the Lo and Hi using a 2x type, then widen the rest of the way with INSERT_SUBVECTOR?

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@mshockwave mshockwave Mar 20, 2025

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Yes it's better (no tu). It's fixed now.

; CHECK-NEXT: vslideup.vi v9, v8, 2
; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
; CHECK-NEXT: vse8.v v9, (a2)
Expand All @@ -403,7 +403,7 @@ define void @deinterleave4_8_i8_two_source(ptr %in0, ptr %in1, ptr %out) {
; CHECK-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
; CHECK-NEXT: vnsrl.wi v8, v8, 0
; CHECK-NEXT: vnsrl.wi v9, v9, 0
; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
; CHECK-NEXT: vsetivli zero, 4, e8, mf2, tu, ma
; CHECK-NEXT: vslideup.vi v9, v8, 2
; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
; CHECK-NEXT: vse8.v v9, (a2)
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