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Add clang driver changes to support MTI RISC-V #134065

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513b1ae
[clang][RISCV] Set default CPU for vendor
djtodoro Mar 26, 2025
8c1ca6a
[clang] Add driver support for riscv64-mti toolchains
djtodoro Mar 26, 2025
bf3b7d4
followup: Add test and minor fixes
djtodoro Apr 3, 2025
dbe6546
followup: Address comments
djtodoro Apr 7, 2025
eb87612
followup: fix format
djtodoro Apr 7, 2025
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9 changes: 8 additions & 1 deletion clang/lib/Driver/ToolChains/Arch/RISCV.cpp
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Expand Up @@ -337,11 +337,14 @@ std::string riscv::getRISCVArch(const llvm::opt::ArgList &Args,
// - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac`
// - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`)
if (Triple.isRISCV32()) {
if (Triple.getOS() == llvm::Triple::UnknownOS)
if (Triple.getOS() == llvm::Triple::UnknownOS &&
Triple.getVendor() != llvm::Triple::MipsTechnologies)
return "rv32imac";
return "rv32imafdc";
}

if (Triple.getVendor() == llvm::Triple::MipsTechnologies)
return "rv64imafdc_zba_zbb_zicsr_zifencei";
if (Triple.getOS() == llvm::Triple::UnknownOS)
return "rv64imac";
if (Triple.isAndroid())
Expand All @@ -365,5 +368,9 @@ std::string riscv::getRISCVTargetCPU(const llvm::opt::ArgList &Args,
if (!CPU.empty())
return CPU;

if (Triple.getVendor() == llvm::Triple::MipsTechnologies &&
Triple.isRISCV64())
return "mips-p8700";

return Triple.isRISCV64() ? "generic-rv64" : "generic-rv32";
}
38 changes: 35 additions & 3 deletions clang/lib/Driver/ToolChains/Gnu.cpp
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Expand Up @@ -402,6 +402,9 @@ void tools::gnutools::Linker::ConstructJob(Compilation &C, const JobAction &JA,
CmdArgs.push_back(Arch == llvm::Triple::aarch64_be ? "-EB" : "-EL");
}

if (Triple.isRISCV() && Triple.getVendor() == llvm::Triple::MipsTechnologies)
CmdArgs.push_back("-EL");
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@jrtc27 jrtc27 Apr 8, 2025

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This one confuses me. Why do you need it when non-MIPS doesn't?


// Most Android ARM64 targets should enable the linker fix for erratum
// 843419. Only non-Cortex-A53 devices are allowed to skip this flag.
if (Arch == llvm::Triple::aarch64 && (isAndroid || isOHOSFamily)) {
Expand Down Expand Up @@ -765,7 +768,8 @@ void tools::gnutools::Assembler::ConstructJob(Compilation &C,
}
case llvm::Triple::riscv32:
case llvm::Triple::riscv64: {
StringRef ABIName = riscv::getRISCVABI(Args, getToolChain().getTriple());
const llvm::Triple &Triple = getToolChain().getTriple();
StringRef ABIName = riscv::getRISCVABI(Args, Triple);
CmdArgs.push_back("-mabi");
CmdArgs.push_back(ABIName.data());
std::string MArchName =
Expand All @@ -774,6 +778,10 @@ void tools::gnutools::Assembler::ConstructJob(Compilation &C,
CmdArgs.push_back(Args.MakeArgString(MArchName));
if (!Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, true))
Args.addOptOutFlag(CmdArgs, options::OPT_mrelax, options::OPT_mno_relax);

if (Triple.getVendor() == llvm::Triple::MipsTechnologies)
CmdArgs.push_back("-EL");
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@jrtc27 jrtc27 Apr 8, 2025

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Ditto


break;
}
case llvm::Triple::sparc:
Expand Down Expand Up @@ -1824,9 +1832,19 @@ static void findRISCVBareMetalMultilibs(const Driver &D,
.flag(Twine("-march=", Element.march).str())
.flag(Twine("-mabi=", Element.mabi).str()));
}
SmallVector<MultilibBuilder, 2> Endian;
bool IsMIPS = TargetTriple.getVendor() == llvm::Triple::MipsTechnologies;
if (IsMIPS) {
Endian.push_back(
MultilibBuilder("/riscv").flag("-EL").flag("-EB", /*Disallow=*/true));
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Ditto

Endian.push_back(
MultilibBuilder("/riscveb").flag("-EB").flag("-EL", /*Disallow=*/true));
}
MultilibSet RISCVMultilibs =
MultilibSetBuilder()
.Either(Ms)
.Either(Endian)
.Either(ArrayRef<MultilibBuilder>(Ms))
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@jrtc27 jrtc27 Apr 8, 2025

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What's this got to do with MIPS?

.makeMultilibSet()
.FilterOut(NonExistent)
.setFilePathsCallback([](const Multilib &M) {
Expand All @@ -1850,6 +1868,8 @@ static void findRISCVBareMetalMultilibs(const Driver &D,
}
}

addMultilibFlag(IsMIPS, "-EL", Flags);
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@jrtc27 jrtc27 Apr 8, 2025

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Or all of the rest of these... there are a lot of changes here that I don't understand the need for


if (selectRISCVMultilib(D, RISCVMultilibs, MArch, Flags,
Result.SelectedMultilibs))
Result.Multilibs = RISCVMultilibs;
Expand All @@ -1874,15 +1894,26 @@ static void findRISCVMultilibs(const Driver &D,
MultilibBuilder("lib64/lp64f").flag("-m64").flag("-mabi=lp64f");
MultilibBuilder Lp64d =
MultilibBuilder("lib64/lp64d").flag("-m64").flag("-mabi=lp64d");

SmallVector<MultilibBuilder, 2> Endian;
if (TargetTriple.getVendor() == llvm::Triple::MipsTechnologies) {
Endian.push_back(
MultilibBuilder("/riscv").flag("-EL").flag("-EB", /*Disallow=*/true));
Endian.push_back(
MultilibBuilder("/riscveb").flag("-EB").flag("-EL", /*Disallow=*/true));
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@arichardson arichardson Apr 8, 2025 •
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Shouldn't this be part of a non-vendor specific patch that adds big endian multilib support?

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@djtodoro djtodoro Apr 8, 2025

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yes, makes sense

}

MultilibSet RISCVMultilibs =
MultilibSetBuilder()
.Either(Endian)
.Either({Ilp32, Ilp32f, Ilp32d, Lp64, Lp64f, Lp64d})
.makeMultilibSet()
.FilterOut(NonExistent);

Multilib::flags_list Flags;
bool IsRV64 = TargetTriple.getArch() == llvm::Triple::riscv64;
StringRef ABIName = tools::riscv::getRISCVABI(Args, TargetTriple);
bool IsMIPS = TargetTriple.getVendor() == llvm::Triple::MipsTechnologies;

addMultilibFlag(!IsRV64, "-m32", Flags);
addMultilibFlag(IsRV64, "-m64", Flags);
Expand All @@ -1892,6 +1923,7 @@ static void findRISCVMultilibs(const Driver &D,
addMultilibFlag(ABIName == "lp64", "-mabi=lp64", Flags);
addMultilibFlag(ABIName == "lp64f", "-mabi=lp64f", Flags);
addMultilibFlag(ABIName == "lp64d", "-mabi=lp64d", Flags);
addMultilibFlag(IsMIPS, "-EL", Flags);

if (RISCVMultilibs.select(D, Flags, Result.SelectedMultilibs))
Result.Multilibs = RISCVMultilibs;
Expand Down Expand Up @@ -2516,8 +2548,8 @@ void Generic_GCC::GCCInstallationDetector::AddDefaultGCCPrefixes(
static const char *const RISCV32Triples[] = {"riscv32-unknown-linux-gnu",
"riscv32-unknown-elf"};
static const char *const RISCV64LibDirs[] = {"/lib64", "/lib"};
static const char *const RISCV64Triples[] = {"riscv64-unknown-linux-gnu",
"riscv64-unknown-elf"};
static const char *const RISCV64Triples[] = {
"riscv64-unknown-linux-gnu", "riscv64-unknown-elf", "riscv64-mti-elf"};

static const char *const SPARCv8LibDirs[] = {"/lib32", "/lib"};
static const char *const SPARCv8Triples[] = {"sparc-linux-gnu",
Expand Down
25 changes: 22 additions & 3 deletions clang/lib/Driver/ToolChains/Linux.cpp
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Expand Up @@ -283,11 +283,14 @@ Linux::Linux(const Driver &D, const llvm::Triple &Triple, const ArgList &Args)
const bool IsHexagon = Arch == llvm::Triple::hexagon;
const bool IsRISCV = Triple.isRISCV();
const bool IsCSKY = Triple.isCSKY();
const bool IsMipsSysRoot =
IsMips ||
(IsRISCV && Triple.getVendor() == llvm::Triple::MipsTechnologies);

if (IsCSKY && !SelectedMultilibs.empty())
SysRoot = SysRoot + SelectedMultilibs.back().osSuffix();

if ((IsMips || IsCSKY) && !SysRoot.empty())
if ((IsMipsSysRoot || IsCSKY) && !SysRoot.empty())
ExtraOpts.push_back("--sysroot=" + SysRoot);

// Do not use 'gnu' hash style for Mips targets because .gnu.hash
Expand Down Expand Up @@ -414,7 +417,12 @@ std::string Linux::computeSysRoot() const {
return std::string();
}

if (!GCCInstallation.isValid() || !getTriple().isMIPS())
const bool IsMipsSysRoot =
getTriple().isMIPS() ||
(getTriple().isRISCV() &&
getTriple().getVendor() == llvm::Triple::MipsTechnologies);

if (!GCCInstallation.isValid() || !IsMipsSysRoot)
return std::string();

// Standalone MIPS toolchains use different names for sysroot folder
Expand All @@ -424,8 +432,19 @@ std::string Linux::computeSysRoot() const {
const StringRef InstallDir = GCCInstallation.getInstallPath();
const StringRef TripleStr = GCCInstallation.getTriple().str();
const Multilib &Multilib = GCCInstallation.getMultilib();
std::string Path;
if (getTriple().isRISCV()) {
Path =
(InstallDir + "/../../../../sysroot" + Multilib.osSuffix() + "/../..")
.str();

if (getVFS().exists(Path))
return Path;

return std::string();
}

std::string Path =
Path =
(InstallDir + "/../../../../" + TripleStr + "/libc" + Multilib.osSuffix())
.str();

Expand Down
4 changes: 4 additions & 0 deletions clang/lib/Driver/ToolChains/RISCVToolchain.cpp
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Expand Up @@ -173,6 +173,9 @@ void RISCV::Linker::ConstructJob(Compilation &C, const JobAction &JA,
}
CmdArgs.push_back("-X");

if (ToolChain.getTriple().getVendor() == llvm::Triple::MipsTechnologies)
CmdArgs.push_back("-EL");

std::string Linker = getToolChain().GetLinkerPath();

bool WantCRTs =
Expand Down Expand Up @@ -229,4 +232,5 @@ void RISCV::Linker::ConstructJob(Compilation &C, const JobAction &JA,
JA, *this, ResponseFileSupport::AtFileCurCP(), Args.MakeArgString(Linker),
CmdArgs, Inputs, Output));
}

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Suggested change

// RISCV tools end.
15 changes: 15 additions & 0 deletions clang/test/Driver/riscv-cpus.c
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Expand Up @@ -115,6 +115,21 @@
// MCPU-MIPS-P8700-SAME: "-target-feature" "+zba"
// MCPU-MIPS-P8700-SAME: "-target-feature" "+zbb"

// RUN: %clang --target=riscv64-mti-linux-gnu -### -c %s 2>&1| FileCheck -check-prefix=MCPU-MTI-P8700 %s
// RUN: %clang --target=riscv64-mti-unknown-gnu -### -c %s 2>&1| FileCheck -check-prefix=MCPU-MTI-P8700 %s
// MCPU-MTI-P8700: "-target-cpu" "mips-p8700"
// MCPU-MTI-P8700-SAME: "-target-feature" "+m"
// MCPU-MTI-P8700-SAME: "-target-feature" "+a"
// MCPU-MTI-P8700-SAME: "-target-feature" "+f"
// MCPU-MTI-P8700-SAME: "-target-feature" "+d"
// MCPU-MTI-P8700-SAME: "-target-feature" "+c"
// MCPU-MTI-P8700-SAME: "-target-feature" "+zicsr"
// MCPU-MTI-P8700-SAME: "-target-feature" "+zifencei"
// MCPU-MTI-P8700-SAME: "-target-feature" "+zaamo"
// MCPU-MTI-P8700-SAME: "-target-feature" "+zalrsc"
// MCPU-MTI-P8700-SAME: "-target-feature" "+zba"
// MCPU-MTI-P8700-SAME: "-target-feature" "+zbb"

// RUN: %clang --target=riscv32 -### -c %s 2>&1 -mtune=syntacore-scr1-base | FileCheck -check-prefix=MTUNE-SYNTACORE-SCR1-BASE %s
// MTUNE-SYNTACORE-SCR1-BASE: "-tune-cpu" "syntacore-scr1-base"

Expand Down
7 changes: 7 additions & 0 deletions clang/test/Driver/riscv64-toolchain.c
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Expand Up @@ -106,6 +106,13 @@
// C-RV64-LINUX-MULTI-LP64D: "-L{{.*}}/Inputs/multilib_riscv_linux_sdk/sysroot/lib64/lp64d"
// C-RV64-LINUX-MULTI-LP64D: "-L{{.*}}/Inputs/multilib_riscv_linux_sdk/sysroot/usr/lib64/lp64d"

// RUN: env "PATH=" %clang -### %s \
// RUN: --target=riscv64-mti-linux-gnu \
// RUN: --gcc-toolchain=%S/Inputs/multilib_riscv_linux_sdk 2>&1 \
// RUN: | FileCheck -check-prefix=MTI-RV64-LINUX-MULTI %s

// MTI-RV64-LINUX-MULTI: "--sysroot={{.*}}/Inputs/multilib_riscv_linux_sdk/lib/gcc/riscv64-unknown-linux-gnu/7.2.0/../../../../sysroot/../.."

// RUN: env "PATH=" %clang -### %s -fuse-ld=ld \
// RUN: --target=riscv64-unknown-elf --rtlib=platform --unwindlib=platform --sysroot= \
// RUN: -march=rv64imac -mabi=lp64\
Expand Down
12 changes: 10 additions & 2 deletions llvm/lib/Target/RISCV/RISCVSubtarget.cpp
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Expand Up @@ -79,8 +79,16 @@ RISCVSubtarget::initializeSubtargetDependencies(const Triple &TT, StringRef CPU,
StringRef ABIName) {
// Determine default and user-specified characteristics
bool Is64Bit = TT.isArch64Bit();
if (CPU.empty() || CPU == "generic")
CPU = Is64Bit ? "generic-rv64" : "generic-rv32";
if (CPU.empty() || CPU == "generic") {
if (Is64Bit) {
if (TT.getVendor() == llvm::Triple::MipsTechnologies)
CPU = "mips-p8700";
else
CPU = "generic-rv64";
} else {
CPU = "generic-rv32";
}
}

if (TuneCPU.empty())
TuneCPU = CPU;
Expand Down