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[RISCV] Check S0 register list check for qc.cm.pushfp to after we parsed the whole register list. #134180

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Merged
merged 1 commit into from
Apr 3, 2025
Merged

[RISCV] Check S0 register list check for qc.cm.pushfp to after we parsed the whole register list. #134180

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20 changes: 5 additions & 15 deletions llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2588,20 +2588,8 @@ ParseStatus RISCVAsmParser::parseRegListCommon(OperandVector &Operands,
return Error(getLoc(), "register list must start from 'ra' or 'x1'");
getLexer().Lex();

bool SeenComma = parseOptionalToken(AsmToken::Comma);

// There are two choices here:
// - `s0` is not required (usual case), so only try to parse `s0` if there is
// a comma
// - `s0` is required (qc.cm.pushfp), and so we must see the comma between
// `ra` and `s0` and must always try to parse `s0`, below
if (MustIncludeS0 && !SeenComma) {
Error(getLoc(), "register list must include 's0' or 'x8'");
return ParseStatus::Failure;
}

// parse case like ,s0 (knowing the comma must be there if required)
if (SeenComma) {
if (parseOptionalToken(AsmToken::Comma)) {
if (getLexer().isNot(AsmToken::Identifier))
return Error(getLoc(), "invalid register");
StringRef RegName = getLexer().getTok().getIdentifier();
Expand Down Expand Up @@ -2664,8 +2652,10 @@ ParseStatus RISCVAsmParser::parseRegListCommon(OperandVector &Operands,

auto Encode = RISCVZC::encodeRlist(RegEnd, IsRVE);
assert(Encode != RISCVZC::INVALID_RLIST);
if (MustIncludeS0)
assert(Encode != RISCVZC::RA);

if (MustIncludeS0 && Encode == RISCVZC::RA)
return Error(S, "register list must include 's0' or 'x8'");

Operands.push_back(RISCVOperand::createRlist(Encode, S));

return ParseStatus::Success;
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2 changes: 1 addition & 1 deletion llvm/test/MC/RISCV/rv32xqccmp-invalid.s
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Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,6 @@ qc.cm.pushfp {ra, s0}, -12
# CHECK-ERROR: :[[@LINE+1]]:24: error: stack adjustment for register list must be a multiple of 16 bytes in the range [16, 64]
qc.cm.pop {ra, s0-s1}, -40

# CHECK-ERROR: :[[@LINE+1]]:17: error: register list must include 's0' or 'x8'
# CHECK-ERROR: :[[@LINE+1]]:14: error: register list must include 's0' or 'x8'
qc.cm.pushfp {ra}, -16

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