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8 changes: 6 additions & 2 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -147,12 +147,16 @@ bool SIInstrInfo::isReallyTriviallyReMaterializable(
}

// Returns true if the scalar result of a VALU instruction depends on exec.
static bool resultDependsOnExec(const MachineInstr &MI) {
bool SIInstrInfo::resultDependsOnExec(const MachineInstr &MI) const {
// Ignore comparisons which are only used masked with exec.
// This allows some hoisting/sinking of VALU comparisons.
if (MI.isCompare()) {
const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo();
Register DstReg = MI.getOperand(0).getReg();
const MachineOperand *Dst = getNamedOperand(MI, AMDGPU::OpName::sdst);
if (!Dst)
return true;

Register DstReg = Dst->getReg();
if (!DstReg.isVirtual())
return true;
for (MachineInstr &Use : MRI.use_nodbg_instructions(DstReg)) {
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2 changes: 2 additions & 0 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -183,6 +183,8 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
bool verifyCopy(const MachineInstr &MI, const MachineRegisterInfo &MRI,
StringRef &ErrInfo) const;

bool resultDependsOnExec(const MachineInstr &MI) const;

protected:
/// If the specific machine instruction is a instruction that moves/copies
/// value from one register to another register return destination and source
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25 changes: 25 additions & 0 deletions llvm/test/CodeGen/AMDGPU/si-instr-info-vopc-exec.mir
Original file line number Diff line number Diff line change
@@ -0,0 +1,25 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=machine-cse %s -o - | FileCheck %s

# Check only that V_CMP_EQ_U32_e32 does not lead to a crash.

---
name: depends_on_exec_check_can_handle_vopc
tracksRegLiveness: true
body: |
bb.0:
; CHECK-LABEL: name: depends_on_exec_check_can_handle_vopc
; CHECK: [[DEF:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
; CHECK-NEXT: V_CMP_EQ_U32_e32 1, killed undef [[DEF]], implicit-def $vcc_lo, implicit $exec
; CHECK-NEXT: [[V_CNDMASK_B32_e32_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e32 16256, undef [[DEF]], implicit $vcc_lo, implicit $exec
; CHECK-NEXT: [[V_LSHLREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHLREV_B32_e64 16, undef [[V_CNDMASK_B32_e32_]], implicit $exec
; CHECK-NEXT: SI_RETURN
%0:vgpr_32 = IMPLICIT_DEF
V_CMP_EQ_U32_e32 1, killed undef %0, implicit-def $vcc, implicit $exec
%1:vgpr_32 = V_CNDMASK_B32_e32 16256, undef %0, implicit $vcc, implicit $exec
V_CMP_EQ_U32_e32 1, killed undef %0, implicit-def $vcc, implicit $exec
%2:vgpr_32 = V_CNDMASK_B32_e32 16256, undef %0, implicit $vcc, implicit $exec
%3:vgpr_32 = V_LSHLREV_B32_e64 16, killed undef %2, implicit $exec
%4:vgpr_32 = V_LSHLREV_B32_e64 16, killed undef %1, implicit $exec
SI_RETURN
...