Skip to content

[MIPS] Add FeatureMSA to i6400 and i6500 cores #134985

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 8 commits into from
May 7, 2025
Merged

[MIPS] Add FeatureMSA to i6400 and i6500 cores #134985

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
8 commits
Select commit Hold shift + click to select a range
36a78bb
[MIPS] Add FeatureMSA to i6400 and i6500 cores
mgoudar Apr 1, 2025
4ed92eb
Update test case with update_llc_test_checks.py
mgoudar Apr 10, 2025
8f2d850
Add test case to test MSA feature for i6400 and i6500 MIPS cpus
mgoudar Apr 17, 2025
f1b35e8
Enable MSA feature by default for MIPS cpus i6400 and i6500
mgoudar Apr 23, 2025
dad1337
Revert "Enable MSA feature by default for MIPS cpus i6400 and i6500"
mgoudar Apr 23, 2025
53467c3
Revert "Revert "Enable MSA feature by default for MIPS cpus i6400 and…
mgoudar Apr 23, 2025
9a1e1ea
add llvm codegen test to validate MSA instructions for CPU i6500 and …
mgoudar Apr 23, 2025
79fd97c
Use llvm/test/CodeGen/Mips/msa/arithmetic.ll for i6500 test
mgoudar May 6, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
6 changes: 6 additions & 0 deletions clang/lib/Driver/ToolChains/Arch/Mips.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -255,6 +255,12 @@ void mips::getMIPSTargetFeatures(const Driver &D, const llvm::Triple &Triple,
D.Diag(diag::err_drv_unsupported_noabicalls_pic);
}

if (CPUName == "i6500" || CPUName == "i6400") {
// MIPS cpu i6400 and i6500 support MSA (Mips SIMD Architecture)
// by default.
Features.push_back("+msa");
}

if (!UseAbiCalls)
Features.push_back("+noabicalls");
else
Expand Down
9 changes: 9 additions & 0 deletions clang/test/Driver/mips-cpus.c
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -0,0 +1,9 @@
// Check target CPUs are correctly passed.

// RUN: %clang --target=mips64 -### -c %s 2>&1 -mcpu=i6400 | FileCheck -check-prefix=MCPU-I6400 %s
// MCPU-I6400: "-target-cpu" "i6400"
Copy link
Member

@mshockwave mshockwave Apr 18, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

usually we will check all the features implied by this CPU. Not sure if this is practical in your case though.

Copy link
Contributor Author

@mgoudar mgoudar Apr 23, 2025

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I modified test to verify abicalls feature as well. I see that mips-features.c test available to verify other features based on the options

// MCPU-I6400: "-target-feature" "+msa" "-target-feature" "-noabicalls"

// RUN: %clang --target=mips64 -### -c %s 2>&1 -mcpu=i6500 | FileCheck -check-prefix=MCPU-I6500 %s
// MCPU-I6500: "-target-cpu" "i6500"
// MCPU-I6500: "-target-feature" "+msa" "-target-feature" "-noabicalls"
4 changes: 2 additions & 2 deletions llvm/lib/Target/Mips/Mips.td
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -242,11 +242,11 @@ def ImplP5600 : SubtargetFeature<"p5600", "ProcImpl",
// same CPU architecture.
def ImplI6400
: SubtargetFeature<"i6400", "ProcImpl", "MipsSubtarget::CPU::I6400",
"MIPS I6400 Processor", [FeatureMips64r6]>;
"MIPS I6400 Processor", [FeatureMips64r6, FeatureMSA]>;

def ImplI6500
: SubtargetFeature<"i6500", "ProcImpl", "MipsSubtarget::CPU::I6500",
"MIPS I6500 Processor", [FeatureMips64r6]>;
"MIPS I6500 Processor", [FeatureMips64r6, FeatureMSA]>;

class Proc<string Name, list<SubtargetFeature> Features>
: ProcessorModel<Name, MipsGenericModel, Features>;
Expand Down
2 changes: 2 additions & 0 deletions llvm/test/CodeGen/Mips/msa/arithmetic.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=mips -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s --check-prefixes=ALL,MIPS
; RUN: llc -mtriple=mipsel -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s --check-prefixes=ALL,MIPSEL
; RUN: llc -mtriple=mips64 -mcpu=i6500 < %s | FileCheck %s --check-prefixes=ALL
; RUN: llc -mtriple=mips64 -mcpu=i6400 < %s | FileCheck %s --check-prefixes=ALL

define void @add_v16i8(ptr %c, ptr %a, ptr %b) nounwind {
; ALL-LABEL: add_v16i8:
Expand Down