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[clang][SPIRV] Set program address space for Intel-flavored SPIR-V #135251

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[clang][SPIRV] Set program address space for Intel-flavored SPIR-V #135251

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[clang][SPIRV] Set program address space for Intel-flavored SPIR-V
sarnex Aug 26, 2025
51d554e
use 9 for program AS, enable function ptr ext by default
sarnex Sep 3, 2025
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2 changes: 2 additions & 0 deletions clang/lib/Basic/Targets.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -683,6 +683,8 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
return std::make_unique<SPIRV64AMDGCNTargetInfo>(Triple, Opts);
return nullptr;
}
if (Triple.getVendor() == llvm::Triple::Intel)
return std::make_unique<SPIRV64IntelTargetInfo>(Triple, Opts);
return std::make_unique<SPIRV64TargetInfo>(Triple, Opts);
}
case llvm::Triple::wasm32:
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11 changes: 11 additions & 0 deletions clang/lib/Basic/Targets/SPIR.h
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Expand Up @@ -469,6 +469,17 @@ class LLVM_LIBRARY_VISIBILITY SPIRV64AMDGCNTargetInfo final
bool hasInt128Type() const override { return TargetInfo::hasInt128Type(); }
};

class LLVM_LIBRARY_VISIBILITY SPIRV64IntelTargetInfo final
: public SPIRV64TargetInfo {
public:
SPIRV64IntelTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
: SPIRV64TargetInfo(Triple, Opts) {
assert(Triple.getVendor() == llvm::Triple::VendorType::Intel &&
"64-bit Intel SPIR-V target must use Intel vendor");
resetDataLayout("e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-"
"v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P4-A0");
}
};
} // namespace targets
} // namespace clang
#endif // LLVM_CLANG_LIB_BASIC_TARGETS_SPIR_H
8 changes: 5 additions & 3 deletions clang/test/CodeGenSPIRV/spirv-intel.c
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@@ -1,9 +1,11 @@
// RUN: %clang_cc1 -triple spirv64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s
// RUN: %clang_cc1 -triple spirv32-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH %s
// RUN: %clang_cc1 -triple spirv64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH-64 %s
// RUN: %clang_cc1 -triple spirv32-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITH-32 %s
// RUN: %clang_cc1 -triple spir-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s
// RUN: %clang_cc1 -triple spir64-intel %s -emit-llvm -o - | FileCheck -check-prefix=CHECK-WITHOUT %s

// CHECK-WITH: spir_func void @foo(ptr addrspace(4) noundef %param) #0 {
// CHECK-WITH-64: spir_func void @foo(ptr addrspace(4) noundef %param) addrspace(4) #0 {
// CHECK-WITH-32: spir_func void @foo(ptr addrspace(4) noundef %param) #0 {

// CHECK-WITHOUT: spir_func void @foo(ptr noundef %param) #0 {
void foo(int *param) {
}
2 changes: 1 addition & 1 deletion clang/test/OpenMP/spirv_variant_match.cpp
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Expand Up @@ -35,7 +35,7 @@ int foo() { return 1; }

// CHECK-DAG: define{{.*}} @{{"_Z[0-9]+foo\$ompvariant\$.*"}}()

// CHECK-DAG: call spir_func noundef i32 @{{"_Z[0-9]+foo\$ompvariant\$.*"}}()
// CHECK-DAG: call spir_func noundef addrspace(4) i32 @{{"_Z[0-9]+foo\$ompvariant\$.*"}}()

int main() {
int res;
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3 changes: 3 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
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Expand Up @@ -77,6 +77,9 @@ static std::string computeDataLayout(const Triple &TT) {
TT.getOS() == Triple::OSType::AMDHSA)
return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-"
"v512:512-v1024:1024-n32:64-S32-G1-P4-A0";
if (TT.getVendor() == Triple::VendorType::Intel)
return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-"
"v512:512-v1024:1024-n8:16:32:64-G1-P4-A0";
return "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-"
"v512:512-v1024:1024-n8:16:32:64-G1";
}
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