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[AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking #135339

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Merged
merged 1 commit into from
Apr 22, 2025
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[AMDGPU][InsertWaitCnts] Add test for global_wb/inv/wbinv tracking #135339

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129 changes: 129 additions & 0 deletions llvm/test/CodeGen/AMDGPU/insert-waitcnts-gfx12-wbinv.mir
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Original file line number Diff line number Diff line change
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass si-insert-waitcnts -o - %s | FileCheck %s


# Check storecnt is not eliminated after global_wb/wbinv or
# loadcnt after inv.
---

name: wb_storecnt
body: |
; CHECK-LABEL: name: wb_storecnt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_WAIT_LOADCNT_DSCNT 0
; CHECK-NEXT: S_WAIT_EXPCNT 0
; CHECK-NEXT: S_WAIT_SAMPLECNT 0
; CHECK-NEXT: S_WAIT_BVHCNT 0
; CHECK-NEXT: S_WAIT_KMCNT 0
; CHECK-NEXT: S_WAIT_STORECNT 0
; CHECK-NEXT: S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: GLOBAL_WB 16, implicit $exec
; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
; CHECK-NEXT: S_CBRANCH_SCC0 %bb.1, implicit killed $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: S_ENDPGM 0
bb.0:
S_WAIT_LOADCNT_soft 0
S_WAIT_STORECNT_soft 0
S_WAIT_DSCNT_soft 0
S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
S_CBRANCH_SCC1 %bb.2, implicit killed $scc
bb.1:
GLOBAL_WB 16, implicit $exec
S_WAIT_LOADCNT_soft 0
S_WAIT_STORECNT_soft 0
GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
S_CBRANCH_SCC0 %bb.1, implicit killed $scc
bb.2:
S_ENDPGM 0
...
---

name: wbinv_storecnt
body: |
; CHECK-LABEL: name: wbinv_storecnt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_WAIT_LOADCNT_DSCNT 0
; CHECK-NEXT: S_WAIT_EXPCNT 0
; CHECK-NEXT: S_WAIT_SAMPLECNT 0
; CHECK-NEXT: S_WAIT_BVHCNT 0
; CHECK-NEXT: S_WAIT_KMCNT 0
; CHECK-NEXT: S_WAIT_STORECNT 0
; CHECK-NEXT: S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: GLOBAL_WBINV 16, implicit $exec
; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
; CHECK-NEXT: S_CBRANCH_SCC0 %bb.1, implicit killed $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: S_ENDPGM 0
bb.0:
S_WAIT_LOADCNT_soft 0
S_WAIT_STORECNT_soft 0
S_WAIT_DSCNT_soft 0
S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
S_CBRANCH_SCC1 %bb.2, implicit killed $scc
bb.1:
GLOBAL_WBINV 16, implicit $exec
S_WAIT_LOADCNT_soft 0
S_WAIT_STORECNT_soft 0
GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
S_CBRANCH_SCC0 %bb.1, implicit killed $scc
bb.2:
S_ENDPGM 0
...
---

name: inv_loadcnt
body: |
; CHECK-LABEL: name: inv_loadcnt
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: S_WAIT_LOADCNT_DSCNT 0
; CHECK-NEXT: S_WAIT_EXPCNT 0
; CHECK-NEXT: S_WAIT_SAMPLECNT 0
; CHECK-NEXT: S_WAIT_BVHCNT 0
; CHECK-NEXT: S_WAIT_KMCNT 0
; CHECK-NEXT: S_WAIT_STORECNT 0
; CHECK-NEXT: S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
; CHECK-NEXT: S_CBRANCH_SCC1 %bb.2, implicit killed $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: GLOBAL_INV 16, implicit $exec
; CHECK-NEXT: GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
; CHECK-NEXT: S_CBRANCH_SCC0 %bb.1, implicit killed $scc
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: S_ENDPGM 0
bb.0:
S_WAIT_LOADCNT_soft 0
S_WAIT_STORECNT_soft 0
S_WAIT_DSCNT_soft 0
S_CMP_EQ_U32 renamable $sgpr1, 0, implicit-def $scc
S_CBRANCH_SCC1 %bb.2, implicit killed $scc
bb.1:
GLOBAL_INV 16, implicit $exec
S_WAIT_LOADCNT_soft 0
S_WAIT_STORECNT_soft 0
GLOBAL_STORE_DWORD_SADDR renamable $vgpr0, renamable $vgpr1, renamable $sgpr2_sgpr3, 0, 16, implicit $exec
S_CBRANCH_SCC0 %bb.1, implicit killed $scc
bb.2:
S_ENDPGM 0
...
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