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[flang] Add 32-bit AIX target specific in order to build 32-bit flang-rt #136051

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Merged
merged 2 commits into from
Apr 17, 2025
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[flang] Add 32-bit AIX target specific in order to build 32-bit flang-rt #136051

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116de4f
[flang] Add 32-bit AIX target specific in order to build 32-bit flang…
DanielCChen Apr 16, 2025
2d5c50e
Update LIT tests to include powerpc-ibm-aix variation.
DanielCChen Apr 17, 2025
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34 changes: 34 additions & 0 deletions flang/lib/Optimizer/CodeGen/Target.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1020,6 +1020,37 @@ struct TargetAArch64 : public GenericTarget<TargetAArch64> {
};
} // namespace

//===----------------------------------------------------------------------===//
// PPC (AIX 32 bit) target specifics.
//===----------------------------------------------------------------------===//
namespace {
struct TargetPPC : public GenericTarget<TargetPPC> {
using GenericTarget::GenericTarget;

static constexpr int defaultWidth = 32;

CodeGenSpecifics::Marshalling
complexArgumentType(mlir::Location, mlir::Type eleTy) const override {
CodeGenSpecifics::Marshalling marshal;
// two distinct element type arguments (re, im)
marshal.emplace_back(eleTy, AT{});
marshal.emplace_back(eleTy, AT{});
return marshal;
}

CodeGenSpecifics::Marshalling
complexReturnType(mlir::Location, mlir::Type eleTy) const override {
CodeGenSpecifics::Marshalling marshal;
// Use a type that will be translated into LLVM as:
// { t, t } struct of 2 element type
marshal.emplace_back(
mlir::TupleType::get(eleTy.getContext(), mlir::TypeRange{eleTy, eleTy}),
AT{});
return marshal;
}
};
} // namespace

//===----------------------------------------------------------------------===//
// PPC64 (AIX 64 bit) target specifics.
//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -1847,6 +1878,9 @@ fir::CodeGenSpecifics::get(mlir::MLIRContext *ctx, llvm::Triple &&trp,
case llvm::Triple::ArchType::aarch64:
return std::make_unique<TargetAArch64>(
ctx, std::move(trp), std::move(kindMap), targetCPU, targetFeatures, dl);
case llvm::Triple::ArchType::ppc:
return std::make_unique<TargetPPC>(ctx, std::move(trp), std::move(kindMap),
targetCPU, targetFeatures, dl);
case llvm::Triple::ArchType::ppc64:
return std::make_unique<TargetPPC64>(
ctx, std::move(trp), std::move(kindMap), targetCPU, targetFeatures, dl);
Expand Down
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