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AMDGPU: Remove amdhsa_code_object_version module flags from most tests #136363

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Apr 24, 2025
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AMDGPU: Remove amdhsa_code_object_version module flags from most tests #136363

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2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/crash-stack-address-O0.ll
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Expand Up @@ -26,5 +26,3 @@ entry:
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
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Expand Up @@ -210,5 +210,3 @@ entry:
ret ptr addrspace(1) %call
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
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Expand Up @@ -178,5 +178,3 @@ define <2 x half> @test_atomicrmw_fmax_vector(ptr addrspace(3) %addr) {
ret <2 x half> %oldval
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
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Expand Up @@ -227,5 +227,3 @@ define void @func_call_no_other_sgprs() {
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
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Expand Up @@ -3013,5 +3013,3 @@ attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind noinline }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
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Expand Up @@ -90,5 +90,3 @@ define amdgpu_kernel void @test_call_external_void_func_sret_struct_i8_i32_byval
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
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Expand Up @@ -6124,5 +6124,3 @@ attributes #0 = { nounwind }
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind noinline }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
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Expand Up @@ -23,5 +23,3 @@ entry:
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
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Expand Up @@ -74,5 +74,3 @@ define amdgpu_gfx void @test_gfx_indirect_call_sgpr_ptr(ptr %fptr) {
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
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Expand Up @@ -1488,5 +1488,3 @@ entry:
attributes #0 = { nounwind }
attributes #1 = { nounwind noinline "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
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Expand Up @@ -43,5 +43,3 @@ define void @tail_call_void_func_void() {
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
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Expand Up @@ -273,8 +273,6 @@ declare i32 @llvm.amdgcn.workitem.id.x() #0

attributes #0 = { nounwind readnone speculatable }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; ASSUME1024: {{.*}}
; DEFAULTSIZE: {{.*}}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll
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Expand Up @@ -418,5 +418,3 @@ declare void @llvm.debugtrap()

attributes #0 = { "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-work-group-id-x" "amdgpu-no-work-group-id-y" "amdgpu-no-work-group-id-z" "amdgpu-no-work-item-id-x" "amdgpu-no-work-item-id-y" "amdgpu-no-work-item-id-z" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
4 changes: 0 additions & 4 deletions llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
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Expand Up @@ -167,12 +167,8 @@ define ptr addrspace(3) @ret_constant_cast_group_gv_gep_to_flat_to_group() #1 {
attributes #0 = { argmemonly nounwind }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
; HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nounwind willreturn memory(argmem: readwrite) }
; HSA: attributes #[[ATTR1]] = { nounwind "amdgpu-agpr-alloc"="0" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
; HSA: attributes #[[ATTR2]] = { nounwind "amdgpu-agpr-alloc"="0" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
;.
; HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/addrspacecast.gfx6.ll
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Expand Up @@ -207,5 +207,3 @@ define ptr addrspace(6) @addrspacecast_flat_null_to_constant32bit() {

attributes #0 = { "amdgpu-32bit-address-high-bits"="0xffff8000" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
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Expand Up @@ -769,5 +769,3 @@ define double @test_pown_fast_f64_known_odd(double %x, i32 %y.arg) {
ret double %call
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
6 changes: 0 additions & 6 deletions llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa-call.ll
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Expand Up @@ -689,8 +689,6 @@ attributes #5 = { nounwind sanitize_address "amdgpu-no-implicitarg-ptr" }
attributes #6 = { "enqueued-block" }


!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
;.
; ATTRIBUTOR_HSA: attributes #[[ATTR0:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
Expand Down Expand Up @@ -722,7 +720,3 @@ attributes #6 = { "enqueued-block" }
; ATTRIBUTOR_HSA: attributes #[[ATTR26]] = { nounwind }
; ATTRIBUTOR_HSA: attributes #[[ATTR27]] = { "enqueued-block" }
;.
; AKF_HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
; ATTRIBUTOR_HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
4 changes: 0 additions & 4 deletions llvm/test/CodeGen/AMDGPU/annotate-kernel-features-hsa.ll
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Expand Up @@ -472,8 +472,6 @@ define void @use_alloca_func() #1 {
attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}

; AKF_HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
Expand All @@ -492,5 +490,3 @@ attributes #1 = { nounwind }
; HSA: attributes #[[ATTR12]] = { nounwind "amdgpu-agpr-alloc"="0" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
; HSA: attributes #[[ATTR13]] = { nounwind "amdgpu-agpr-alloc"="0" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "uniform-work-group-size"="false" }
;.
; HSA: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 500}
;.
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
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Expand Up @@ -126,5 +126,3 @@ kernel_direct_lighting.exit: ; preds = %if.end294.i.i, %ent

declare float @_Z3dotDv3_fS_(<3 x float>)

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
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Expand Up @@ -1294,5 +1294,3 @@ declare void @f2(i64)

declare i32 @llvm.amdgcn.workitem.id.x()

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage-agpr.ll
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Expand Up @@ -34,5 +34,3 @@ attributes #0 = { noinline norecurse nounwind optnone }
attributes #1 = { noinline norecurse nounwind readnone willreturn }
attributes #2 = { nounwind readnone willreturn }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage0.ll
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Expand Up @@ -29,5 +29,3 @@ attributes #0 = { noinline norecurse nounwind optnone }
attributes #1 = { noinline norecurse nounwind readnone willreturn }
attributes #2 = { nounwind readnone willreturn }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage1.ll
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Expand Up @@ -35,5 +35,3 @@ attributes #0 = { noinline norecurse nounwind optnone }
attributes #1 = { noinline norecurse nounwind readnone willreturn "amdgpu-waves-per-eu"="8,10" }
attributes #2 = { nounwind readnone willreturn }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage2.ll
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Expand Up @@ -32,5 +32,3 @@ attributes #0 = { noinline norecurse nounwind optnone }
attributes #1 = { noinline norecurse nounwind readnone willreturn "amdgpu-waves-per-eu"="4,10" }
attributes #2 = { nounwind readnone willreturn }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-alias-register-usage3.ll
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Expand Up @@ -32,5 +32,3 @@ attributes #0 = { noinline norecurse nounwind optnone }
attributes #1 = { noinline norecurse nounwind readnone willreturn "amdgpu-flat-work-group-size"="1,256" "amdgpu-waves-per-eu"="1,1" }
attributes #2 = { nounwind readnone willreturn }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-args-inreg.ll
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Expand Up @@ -1529,5 +1529,3 @@ define void @test_call_external_void_func_a15i32_inreg_i32_inreg([13 x i32] inre
attributes #0 = { nounwind }
attributes #1 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-queue-ptr" "amdgpu-no-work-group-id-x" "amdgpu-no-work-group-id-y" "amdgpu-no-work-group-id-z" "amdgpu-no-work-item-id-x" "amdgpu-no-work-item-id-y" "amdgpu-no-work-item-id-z" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-argument-types.ll
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Expand Up @@ -7203,5 +7203,3 @@ attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amd
attributes #1 = { nounwind readnone }
attributes #2 = { nounwind noinline }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/call-waitcnt.ll
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Expand Up @@ -156,5 +156,3 @@ declare void @got.func(i32) #0

attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/callee-special-input-sgprs-fixed-abi.ll
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Expand Up @@ -584,5 +584,3 @@ attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind noinline }
attributes #2 = { nounwind noinline "amdgpu-implicitarg-num-bytes"="0" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/cc-update.ll
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Expand Up @@ -610,5 +610,3 @@ attributes #0 = { nounwind }
attributes #1 = { nounwind "amdgpu-num-vgpr"="8" }
attributes #2 = { nounwind "frame-pointer"="all" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
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Expand Up @@ -473,5 +473,3 @@ for.body:
br i1 %cond, label %for.body, label %for.exit
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
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Expand Up @@ -1391,5 +1391,3 @@ attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind convergent }
attributes #2 = { nounwind }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
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Expand Up @@ -286,5 +286,3 @@ declare hidden { <4 x i32>, <4 x half> } @func_struct() #0

attributes #0 = { nounwind}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
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Expand Up @@ -3015,5 +3015,3 @@ for.body.i: ; preds = %for.body.i, %entry
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
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Expand Up @@ -95,5 +95,3 @@ out.else:
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/ds_read2.ll
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Expand Up @@ -1535,5 +1535,3 @@ attributes #1 = { nounwind readnone speculatable }
attributes #2 = { convergent nounwind }
attributes #3 = { nounwind noinline }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/flat-scratch-init.ll
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Expand Up @@ -278,5 +278,3 @@ define amdgpu_kernel void @kernel_no_calls_no_stack() {

attributes #0 = { nounwind }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/fneg-fabs-r600.ll
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Expand Up @@ -176,5 +176,3 @@ declare float @llvm.fabs.f32(float) readnone
declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/fneg-fabs.ll
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Expand Up @@ -276,7 +276,5 @@ declare float @llvm.fabs.f32(float) readnone
declare <2 x float> @llvm.fabs.v2f32(<2 x float>) readnone
declare <4 x float> @llvm.fabs.v4f32(<4 x float>) readnone

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; FUNC: {{.*}}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/gfx11-user-sgpr-init16-bug.ll
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Expand Up @@ -196,5 +196,3 @@ attributes #1 = { "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-ld
attributes #2 = { "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
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Expand Up @@ -14728,6 +14728,4 @@ attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
attributes #1 = { strictfp "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
attributes #2 = { strictfp }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
!1 = !{}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
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Expand Up @@ -9465,7 +9465,5 @@ define amdgpu_kernel void @global_atomic_fmax_uni_address_uni_value_system_scope

attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
!1 = !{}

2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
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Expand Up @@ -9465,6 +9465,4 @@ define amdgpu_kernel void @global_atomic_fmin_uni_address_uni_value_system_scope

attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
!1 = !{}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
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Expand Up @@ -14362,5 +14362,3 @@ attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
attributes #1 = { strictfp "denormal-fp-math-f32"="preserve-sign,preserve-sign" }
attributes #2 = { strictfp }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/implicit-kernel-argument-alignment.ll
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Expand Up @@ -57,5 +57,3 @@ define amdgpu_kernel void @test_aligned_to_eight(i64 %eight) {

declare ptr addrspace(4) @llvm.amdgcn.implicitarg.ptr()

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
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Expand Up @@ -110,5 +110,3 @@ entry:
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
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Expand Up @@ -257,5 +257,3 @@ bb43:

attributes #0 = { noinline optnone }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
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Expand Up @@ -92,5 +92,3 @@ declare void @device_func(ptr addrspace(5))

attributes #0 = { nounwind "frame-pointer"="all" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/lds-frame-extern.ll
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Expand Up @@ -696,5 +696,3 @@ define amdgpu_kernel void @module_1_kernel_overalign_indirect_extern_overalign(i

attributes #0 = { noinline }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
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Expand Up @@ -240,8 +240,6 @@ bb1:
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CI: {{.*}}
; GFX10-GISEL: {{.*}}
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2 changes: 0 additions & 2 deletions llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
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Expand Up @@ -307,8 +307,6 @@ bb1:
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"amdhsa_code_object_version", i32 500}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CI: {{.*}}
; GFX10-GISEL: {{.*}}
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