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[X86] Distribute Certain Bitwise Operations over SELECT #136555

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Merged
merged 3 commits into from
Jun 10, 2025
Merged

[X86] Distribute Certain Bitwise Operations over SELECT #136555

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3572fd8
[X86] Add Tests for Distributing AND/XOR over SELECT; NFC
mskamp Mar 30, 2025
4ced124
[X86] Distribute Certain Bitwise Operations over SELECT
mskamp Mar 30, 2025
b3cbf9b
Merge branch 'main' into fix_131587_redistribute_select_bmi
RKSimon Jun 10, 2025
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23 changes: 22 additions & 1 deletion llvm/lib/Target/X86/X86ISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -35618,8 +35618,29 @@ bool X86TargetLowering::isNarrowingProfitable(SDNode *N, EVT SrcVT,
bool X86TargetLowering::shouldFoldSelectWithIdentityConstant(
unsigned BinOpcode, EVT VT, unsigned SelectOpcode, SDValue X,
SDValue Y) const {
if (SelectOpcode != ISD::VSELECT)
if (SelectOpcode == ISD::SELECT) {
if (VT.isVector())
return false;
if (!Subtarget.hasBMI() || (VT != MVT::i32 && VT != MVT::i64))
return false;
using namespace llvm::SDPatternMatch;
// BLSI
if (BinOpcode == ISD::AND && (sd_match(Y, m_Neg(m_Specific(X))) ||
sd_match(X, m_Neg(m_Specific(Y)))))
return true;
// BLSR
if (BinOpcode == ISD::AND &&
(sd_match(Y, m_Add(m_Specific(X), m_AllOnes())) ||
sd_match(X, m_Add(m_Specific(Y), m_AllOnes()))))
return true;
// BLSMSK
if (BinOpcode == ISD::XOR &&
(sd_match(Y, m_Add(m_Specific(X), m_AllOnes())) ||
sd_match(X, m_Add(m_Specific(Y), m_AllOnes()))))
return true;

return false;
}
// TODO: This is too general. There are cases where pre-AVX512 codegen would
// benefit. The transform may also be profitable for scalar code.
if (!Subtarget.hasAVX512())
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