Skip to content
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 1 addition & 2 deletions llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -8745,15 +8745,14 @@ SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
unsigned CompOpcIeee = IsMax ? ISD::FMAXNUM_IEEE : ISD::FMINNUM_IEEE;
unsigned CompOpc = IsMax ? ISD::FMAXNUM : ISD::FMINNUM;

// FIXME: We should probably define fminnum/fmaxnum variants with correct
// signed zero behavior.
bool MinMaxMustRespectOrderedZero = false;

if (isOperationLegalOrCustom(CompOpcIeee, VT)) {
MinMax = DAG.getNode(CompOpcIeee, DL, VT, LHS, RHS, Flags);
MinMaxMustRespectOrderedZero = true;
} else if (isOperationLegalOrCustom(CompOpc, VT)) {
MinMax = DAG.getNode(CompOpc, DL, VT, LHS, RHS, Flags);
MinMaxMustRespectOrderedZero = true;
} else {
if (VT.isVector() && !isOperationLegalOrCustom(ISD::VSELECT, VT))
return DAG.UnrollVectorOp(N);
Expand Down
200 changes: 76 additions & 124 deletions llvm/test/CodeGen/NVPTX/math-intrins.ll
Original file line number Diff line number Diff line change
Expand Up @@ -681,22 +681,16 @@ define half @minimum_half(half %a, half %b) {
define float @minimum_float(float %a, float %b) {
; CHECK-NOF16-LABEL: minimum_float(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_float_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [minimum_float_param_1];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: min.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [minimum_float_param_0];
; CHECK-NOF16-NEXT: ld.param.f32 %f2, [minimum_float_param_1];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %f1, %f2;
; CHECK-NOF16-NEXT: min.f32 %f3, %f1, %f2;
; CHECK-NOF16-NEXT: selp.f32 %f4, 0f7FC00000, %f3, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_float(
Expand Down Expand Up @@ -727,19 +721,15 @@ define float @minimum_float(float %a, float %b) {
define float @minimum_imm1(float %a) {
; CHECK-NOF16-LABEL: minimum_imm1(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<4>;
; CHECK-NOF16-NEXT: .reg .b32 %r<6>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_imm1_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: min.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r4, %r1, %r3, %p2;
; CHECK-NOF16-NEXT: setp.eq.f32 %p3, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r4, %r3, %p3;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r5;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [minimum_imm1_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %f1, %f1;
; CHECK-NOF16-NEXT: min.f32 %f2, %f1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %f3, 0f7FC00000, %f2, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_imm1(
Expand Down Expand Up @@ -768,19 +758,15 @@ define float @minimum_imm1(float %a) {
define float @minimum_imm2(float %a) {
; CHECK-NOF16-LABEL: minimum_imm2(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<4>;
; CHECK-NOF16-NEXT: .reg .b32 %r<6>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_imm2_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: min.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r4, %r1, %r3, %p2;
; CHECK-NOF16-NEXT: setp.eq.f32 %p3, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r4, %r3, %p3;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r5;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [minimum_imm2_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %f1, %f1;
; CHECK-NOF16-NEXT: min.f32 %f2, %f1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %f3, 0f7FC00000, %f2, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_imm2(
Expand Down Expand Up @@ -809,22 +795,16 @@ define float @minimum_imm2(float %a) {
define float @minimum_float_ftz(float %a, float %b) #1 {
; CHECK-NOF16-LABEL: minimum_float_ftz(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [minimum_float_ftz_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [minimum_float_ftz_param_1];
; CHECK-NOF16-NEXT: setp.nan.ftz.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: min.ftz.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, -2147483648;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.ftz.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [minimum_float_ftz_param_0];
; CHECK-NOF16-NEXT: ld.param.f32 %f2, [minimum_float_ftz_param_1];
; CHECK-NOF16-NEXT: setp.nan.ftz.f32 %p1, %f1, %f2;
; CHECK-NOF16-NEXT: min.ftz.f32 %f3, %f1, %f2;
; CHECK-NOF16-NEXT: selp.f32 %f4, 0f7FC00000, %f3, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: minimum_float_ftz(
Expand Down Expand Up @@ -855,22 +835,16 @@ define float @minimum_float_ftz(float %a, float %b) #1 {
define double @minimum_double(double %a, double %b) {
; CHECK-LABEL: minimum_double(
; CHECK: {
; CHECK-NEXT: .reg .pred %p<5>;
; CHECK-NEXT: .reg .b64 %rd<8>;
; CHECK-NEXT: .reg .pred %p<2>;
; CHECK-NEXT: .reg .b64 %fd<5>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [minimum_double_param_0];
; CHECK-NEXT: ld.param.b64 %rd2, [minimum_double_param_1];
; CHECK-NEXT: setp.nan.f64 %p1, %rd1, %rd2;
; CHECK-NEXT: min.f64 %rd3, %rd1, %rd2;
; CHECK-NEXT: selp.f64 %rd4, 0d7FF8000000000000, %rd3, %p1;
; CHECK-NEXT: setp.eq.b64 %p2, %rd1, -9223372036854775808;
; CHECK-NEXT: selp.f64 %rd5, %rd1, %rd4, %p2;
; CHECK-NEXT: setp.eq.b64 %p3, %rd2, -9223372036854775808;
; CHECK-NEXT: selp.f64 %rd6, %rd2, %rd5, %p3;
; CHECK-NEXT: setp.eq.f64 %p4, %rd4, 0d0000000000000000;
; CHECK-NEXT: selp.f64 %rd7, %rd6, %rd4, %p4;
; CHECK-NEXT: st.param.b64 [func_retval0], %rd7;
; CHECK-NEXT: ld.param.f64 %fd1, [minimum_double_param_0];
; CHECK-NEXT: ld.param.f64 %fd2, [minimum_double_param_1];
; CHECK-NEXT: setp.nan.f64 %p1, %fd1, %fd2;
; CHECK-NEXT: min.f64 %fd3, %fd1, %fd2;
; CHECK-NEXT: selp.f64 %fd4, 0d7FF8000000000000, %fd3, %p1;
; CHECK-NEXT: st.param.f64 [func_retval0], %fd4;
; CHECK-NEXT: ret;
%x = call double @llvm.minimum.f64(double %a, double %b)
ret double %x
Expand Down Expand Up @@ -1212,17 +1186,15 @@ define half @maximum_half(half %a, half %b) {
define float @maximum_imm1(float %a) {
; CHECK-NOF16-LABEL: maximum_imm1(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<3>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_imm1_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: max.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.f32 %p2, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f00000000, %r3, %p2;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [maximum_imm1_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %f1, %f1;
; CHECK-NOF16-NEXT: max.f32 %f2, %f1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %f3, 0f7FC00000, %f2, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_imm1(
Expand Down Expand Up @@ -1251,17 +1223,15 @@ define float @maximum_imm1(float %a) {
define float @maximum_imm2(float %a) {
; CHECK-NOF16-LABEL: maximum_imm2(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<3>;
; CHECK-NOF16-NEXT: .reg .b32 %r<5>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<4>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_imm2_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r1;
; CHECK-NOF16-NEXT: max.f32 %r2, %r1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r3, 0f7FC00000, %r2, %p1;
; CHECK-NOF16-NEXT: setp.eq.f32 %p2, %r3, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f00000000, %r3, %p2;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [maximum_imm2_param_0];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %f1, %f1;
; CHECK-NOF16-NEXT: max.f32 %f2, %f1, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %f3, 0f7FC00000, %f2, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f3;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_imm2(
Expand Down Expand Up @@ -1290,22 +1260,16 @@ define float @maximum_imm2(float %a) {
define float @maximum_float(float %a, float %b) {
; CHECK-NOF16-LABEL: maximum_float(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_float_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [maximum_float_param_1];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: max.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, 0;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, 0;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [maximum_float_param_0];
; CHECK-NOF16-NEXT: ld.param.f32 %f2, [maximum_float_param_1];
; CHECK-NOF16-NEXT: setp.nan.f32 %p1, %f1, %f2;
; CHECK-NOF16-NEXT: max.f32 %f3, %f1, %f2;
; CHECK-NOF16-NEXT: selp.f32 %f4, 0f7FC00000, %f3, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_float(
Expand Down Expand Up @@ -1336,22 +1300,16 @@ define float @maximum_float(float %a, float %b) {
define float @maximum_float_ftz(float %a, float %b) #1 {
; CHECK-NOF16-LABEL: maximum_float_ftz(
; CHECK-NOF16: {
; CHECK-NOF16-NEXT: .reg .pred %p<5>;
; CHECK-NOF16-NEXT: .reg .b32 %r<8>;
; CHECK-NOF16-NEXT: .reg .pred %p<2>;
; CHECK-NOF16-NEXT: .reg .b32 %f<5>;
; CHECK-NOF16-EMPTY:
; CHECK-NOF16-NEXT: // %bb.0:
; CHECK-NOF16-NEXT: ld.param.b32 %r1, [maximum_float_ftz_param_0];
; CHECK-NOF16-NEXT: ld.param.b32 %r2, [maximum_float_ftz_param_1];
; CHECK-NOF16-NEXT: setp.nan.ftz.f32 %p1, %r1, %r2;
; CHECK-NOF16-NEXT: max.ftz.f32 %r3, %r1, %r2;
; CHECK-NOF16-NEXT: selp.f32 %r4, 0f7FC00000, %r3, %p1;
; CHECK-NOF16-NEXT: setp.eq.b32 %p2, %r1, 0;
; CHECK-NOF16-NEXT: selp.f32 %r5, %r1, %r4, %p2;
; CHECK-NOF16-NEXT: setp.eq.b32 %p3, %r2, 0;
; CHECK-NOF16-NEXT: selp.f32 %r6, %r2, %r5, %p3;
; CHECK-NOF16-NEXT: setp.eq.ftz.f32 %p4, %r4, 0f00000000;
; CHECK-NOF16-NEXT: selp.f32 %r7, %r6, %r4, %p4;
; CHECK-NOF16-NEXT: st.param.b32 [func_retval0], %r7;
; CHECK-NOF16-NEXT: ld.param.f32 %f1, [maximum_float_ftz_param_0];
; CHECK-NOF16-NEXT: ld.param.f32 %f2, [maximum_float_ftz_param_1];
; CHECK-NOF16-NEXT: setp.nan.ftz.f32 %p1, %f1, %f2;
; CHECK-NOF16-NEXT: max.ftz.f32 %f3, %f1, %f2;
; CHECK-NOF16-NEXT: selp.f32 %f4, 0f7FC00000, %f3, %p1;
; CHECK-NOF16-NEXT: st.param.f32 [func_retval0], %f4;
; CHECK-NOF16-NEXT: ret;
;
; CHECK-F16-LABEL: maximum_float_ftz(
Expand Down Expand Up @@ -1382,22 +1340,16 @@ define float @maximum_float_ftz(float %a, float %b) #1 {
define double @maximum_double(double %a, double %b) {
; CHECK-LABEL: maximum_double(
; CHECK: {
; CHECK-NEXT: .reg .pred %p<5>;
; CHECK-NEXT: .reg .b64 %rd<8>;
; CHECK-NEXT: .reg .pred %p<2>;
; CHECK-NEXT: .reg .b64 %fd<5>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b64 %rd1, [maximum_double_param_0];
; CHECK-NEXT: ld.param.b64 %rd2, [maximum_double_param_1];
; CHECK-NEXT: setp.nan.f64 %p1, %rd1, %rd2;
; CHECK-NEXT: max.f64 %rd3, %rd1, %rd2;
; CHECK-NEXT: selp.f64 %rd4, 0d7FF8000000000000, %rd3, %p1;
; CHECK-NEXT: setp.eq.b64 %p2, %rd1, 0;
; CHECK-NEXT: selp.f64 %rd5, %rd1, %rd4, %p2;
; CHECK-NEXT: setp.eq.b64 %p3, %rd2, 0;
; CHECK-NEXT: selp.f64 %rd6, %rd2, %rd5, %p3;
; CHECK-NEXT: setp.eq.f64 %p4, %rd4, 0d0000000000000000;
; CHECK-NEXT: selp.f64 %rd7, %rd6, %rd4, %p4;
; CHECK-NEXT: st.param.b64 [func_retval0], %rd7;
; CHECK-NEXT: ld.param.f64 %fd1, [maximum_double_param_0];
; CHECK-NEXT: ld.param.f64 %fd2, [maximum_double_param_1];
; CHECK-NEXT: setp.nan.f64 %p1, %fd1, %fd2;
; CHECK-NEXT: max.f64 %fd3, %fd1, %fd2;
; CHECK-NEXT: selp.f64 %fd4, 0d7FF8000000000000, %fd3, %p1;
; CHECK-NEXT: st.param.f64 [func_retval0], %fd4;
; CHECK-NEXT: ret;
%x = call double @llvm.maximum.f64(double %a, double %b)
ret double %x
Expand Down
Loading
Loading