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[MLIR][GPU] Add a pattern to rewrite gpu.subgroup_id #137671
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| Original file line number | Diff line number | Diff line change |
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| //===- SubgroupIdRewriter.cpp - Implementation of SugroupId rewriting ----===// | ||
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| // | ||
| // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
| // | ||
| // This file implements in-dialect rewriting of the gpu.subgroup_id op for archs | ||
| // where: | ||
| // subgroup_id = (tid.x + dim.x * (tid.y + dim.y * tid.z)) / subgroup_size | ||
| // | ||
| //===----------------------------------------------------------------------===// | ||
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| #include "mlir/Dialect/GPU/IR/GPUDialect.h" | ||
| #include "mlir/Dialect/GPU/Transforms/Passes.h" | ||
| #include "mlir/Dialect/Index/IR/IndexOps.h" | ||
| #include "mlir/IR/Builders.h" | ||
| #include "mlir/IR/PatternMatch.h" | ||
| #include "mlir/Pass/Pass.h" | ||
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| using namespace mlir; | ||
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| namespace { | ||
| struct GpuSubgroupIdRewriter final : OpRewritePattern<gpu::SubgroupIdOp> { | ||
| using OpRewritePattern<gpu::SubgroupIdOp>::OpRewritePattern; | ||
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| LogicalResult matchAndRewrite(gpu::SubgroupIdOp op, | ||
| PatternRewriter &rewriter) const override { | ||
| // Calculation of the thread's subgroup identifier. | ||
| // | ||
| // The process involves mapping the thread's 3D identifier within its | ||
| // block (b_id.x, b_id.y, b_id.z) to a 1D linear index. | ||
| // This linearization assumes a layout where the x-dimension (w_dim.x) | ||
| // varies most rapidly (i.e., it is the innermost dimension). | ||
| // | ||
| // The formula for the linearized thread index is: | ||
| // L = tid.x + dim.x * (tid.y + (dim.y * tid.z)) | ||
| // | ||
| // Subsequently, the range of linearized indices [0, N_threads-1] is | ||
| // divided into consecutive, non-overlapping segments, each representing | ||
| // a subgroup of size 'subgroup_size'. | ||
| // | ||
| // Example Partitioning (N = subgroup_size): | ||
| // | Subgroup 0 | Subgroup 1 | Subgroup 2 | ... | | ||
| // | Indices 0..N-1 | Indices N..2N-1 | Indices 2N..3N-1| ... | | ||
| // | ||
| // The subgroup identifier is obtained via integer division of the | ||
| // linearized thread index by the predefined 'subgroup_size'. | ||
| // | ||
| // subgroup_id = floor( L / subgroup_size ) | ||
| // = (tid.x + dim.x * (tid.y + dim.y * tid.z)) / | ||
| // subgroup_size | ||
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| auto loc = op->getLoc(); | ||
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| Value dimX = rewriter.create<gpu::BlockDimOp>(loc, gpu::Dimension::x); | ||
| Value dimY = rewriter.create<gpu::BlockDimOp>(loc, gpu::Dimension::y); | ||
| Value tidX = rewriter.create<gpu::ThreadIdOp>(loc, gpu::Dimension::x); | ||
| Value tidY = rewriter.create<gpu::ThreadIdOp>(loc, gpu::Dimension::y); | ||
| Value tidZ = rewriter.create<gpu::ThreadIdOp>(loc, gpu::Dimension::z); | ||
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| Value dimYxIdZ = rewriter.create<index::MulOp>(loc, dimY, tidZ); | ||
| Value dimYxIdZPlusIdY = rewriter.create<index::AddOp>(loc, dimYxIdZ, tidY); | ||
| Value dimYxIdZPlusIdYTimesDimX = | ||
| rewriter.create<index::MulOp>(loc, dimX, dimYxIdZPlusIdY); | ||
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Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I think
Contributor
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. ... Hey, why'd this get landed with |
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| Value IdXPlusDimYxIdZPlusIdYTimesDimX = | ||
| rewriter.create<index::AddOp>(loc, tidX, dimYxIdZPlusIdYTimesDimX); | ||
| Value subgroupSize = rewriter.create<gpu::SubgroupSizeOp>( | ||
| loc, rewriter.getIndexType(), /*upper_bound = */ nullptr); | ||
| Value subgroupIdOp = rewriter.create<index::DivUOp>( | ||
| loc, IdXPlusDimYxIdZPlusIdYTimesDimX, subgroupSize); | ||
| rewriter.replaceOp(op, {subgroupIdOp}); | ||
| return success(); | ||
| } | ||
| }; | ||
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| } // namespace | ||
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| void mlir::populateGpuSubgroupIdPatterns(RewritePatternSet &patterns) { | ||
| patterns.add<GpuSubgroupIdRewriter>(patterns.getContext()); | ||
| } | ||
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| // RUN: mlir-opt --test-gpu-rewrite -split-input-file %s | FileCheck %s | ||
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| module { | ||
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| // CHECK-LABEL: func.func @subgroupId | ||
| // CHECK-SAME: (%[[SZ:.*]]: index, %[[MEM:.*]]: memref<index, 1>) { | ||
| func.func @subgroupId(%sz : index, %mem: memref<index, 1>) { | ||
| gpu.launch blocks(%bx, %by, %bz) in (%grid_x = %sz, %grid_y = %sz, %grid_z = %sz) | ||
| threads(%tx, %ty, %tz) in (%block_x = %sz, %block_y = %sz, %block_z = %sz) { | ||
| // CHECK: %[[DIMX:.*]] = gpu.block_dim x | ||
| // CHECK-NEXT: %[[DIMY:.*]] = gpu.block_dim y | ||
| // CHECK-NEXT: %[[TIDX:.*]] = gpu.thread_id x | ||
| // CHECK-NEXT: %[[TIDY:.*]] = gpu.thread_id y | ||
| // CHECK-NEXT: %[[TIDZ:.*]] = gpu.thread_id z | ||
| // CHECK-NEXT: %[[T0:.*]] = index.mul %[[DIMY]], %[[TIDZ]] | ||
| // CHECK-NEXT: %[[T1:.*]] = index.add %[[T0]], %[[TIDY]] | ||
| // CHECK-NEXT: %[[T2:.*]] = index.mul %[[DIMX]], %[[T1]] | ||
| // CHECK-NEXT: %[[T3:.*]] = index.add %[[TIDX]], %[[T2]] | ||
| // CHECK-NEXT: %[[T4:.*]] = gpu.subgroup_size : index | ||
| // CHECK-NEXT: %[[T5:.*]] = index.divu %[[T3]], %[[T4]] | ||
| %idz = gpu.subgroup_id : index | ||
| memref.store %idz, %mem[] : memref<index, 1> | ||
| gpu.terminator | ||
| } | ||
| return | ||
| } | ||
| } | ||
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Let's make sure that this doesn't end up in the SPIR-V lowerings, which seem to have an alternate approach to this op
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I see. SPV links
get_sub_group_idfunction to get the subgroup id. So I think we should just remove this line insidepopulateGpuRewritePatterns.side note: SPIRV uses the same calculation method to compute subgroup_id.
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I eventually stripped it from this function.