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3 changes: 1 addition & 2 deletions llvm/lib/Target/PowerPC/PPC.td
Original file line number Diff line number Diff line change
Expand Up @@ -435,8 +435,7 @@ def ProcessorFeatures {
FeatureP9Vector,
FeaturePPCPreRASched,
FeaturePPCPostRASched,
FeatureISA3_0,
FeaturePredictableSelectIsExpensive
FeatureISA3_0
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Might be a bit of a bigger refactor than you're looking to do here, but the AArch64 backend is a much better model for this: ISA features, and Tune features are separated out into parallel lists.

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@mshockwave mshockwave Apr 30, 2025

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Agree, RISCV is doing that as well. Though I believe doing such separation for PPC is out of the scope of this patch.

];

// Some features are unique to Power9 and there is no reason to assume
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